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Rajwant Singh Sidhu
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Brea, CA, US
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Patents Grants
last 30 patents
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Patent Grant
Method for anchoring a conductive cap on a filled via in a printed...
Patent number
9,913,382
Issue date
Mar 6, 2018
Viasystems Technologies Corp. L.L.C.
Rajwant Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Systems and methods for reducing overhang on electroplated surfaces...
Patent number
9,017,540
Issue date
Apr 28, 2015
Viasystems Technologies Corp. L.L.C.
Rajwant S. Sidhu
C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information
Patent Grant
Methods of manufacturing a printed wiring board having copper wrap...
Patent number
8,510,941
Issue date
Aug 20, 2013
DDI Global Corp.
Rajwant Singh Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method of manufacturing a printed circuit board
Patent number
8,250,751
Issue date
Aug 28, 2012
DDI Global Corp.
Rajwant Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method of manufacturing a multilayer printed wiring board with copp...
Patent number
8,156,645
Issue date
Apr 17, 2012
DDI Global Corp.
Rajwant Singh Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Patents Applications
last 30 patents
Information
Patent Application
METHOD FOR ANCHORING A CONDUCTIVE CAP ON A FILLED VIA IN A PRINTED...
Publication number
20160316563
Publication date
Oct 27, 2016
Viasystems Technologies Corp., L.L.C.
Rajwant Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
METHOD OF MANUFACTURING A PRINTED CIRCUIT BOARD
Publication number
20130220675
Publication date
Aug 29, 2013
Rajwant Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
MULTILAYER PRINTED WIRING BOARDS WITH HOLES REQUIRING COPPER WRAP P...
Publication number
20120144667
Publication date
Jun 14, 2012
DDI GLOBAL CORP.
Rajwant Singh Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
SYSTEMS AND METHODS FOR REDUCING OVERHANG ON ELECTROPLATED SURFACES...
Publication number
20110308956
Publication date
Dec 22, 2011
Rajwant S. Sidhu
C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information
Patent Application
Multilayer printed wiring boards with holes requiring copper wrap p...
Publication number
20080302468
Publication date
Dec 11, 2008
Rajwant Singh Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Multilayer printed wiring boards with copper filled through-holes
Publication number
20080196935
Publication date
Aug 21, 2008
Rajwant Sidhu
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR