Rakesh Channabasappa Yaraduyathinahalli

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Testing read-only memory using memory built-in self-test controller
- Patent number 11,521,698
- Issue date Dec 6, 2022
- Texas Instruments Incorporated
- Prakash Narayanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing read-only memory using memory built-in self-test controller
- Patent number 10,818,374
- Issue date Oct 27, 2020
- Texas Instruments Incorporated
- Prakash Narayanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 10,320,412
- Issue date Jun 11, 2019
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 9,929,744
- Issue date Mar 27, 2018
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory compression operable for non-contiguous write/read addresses
- Patent number 9,793,918
- Issue date Oct 17, 2017
- Texas Instruments Incorporated
- Sundarrajan Rangachari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for fast modification of register content
- Patent number 9,361,027
- Issue date Jun 7, 2016
- Texas Instruments Incorporated
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for asynchronous FIFO circuit
- Patent number 9,275,704
- Issue date Mar 1, 2016
- Texas Instruments Incorporated
- Rakesh Channabasappa Yaraduyathinahalli
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER
- Publication number 20200388346
- Publication date Dec 10, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Prakash NARAYANAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER
- Publication number 20200135290
- Publication date Apr 30, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Prakash NARAYANAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES
- Publication number 20180175880
- Publication date Jun 21, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES
- Publication number 20180041222
- Publication date Feb 8, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan RANGACHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR FAST MODIFICATION OF REGISTER CONTENT
- Publication number 20160170640
- Publication date Jun 16, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Saket Jalan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Compression Operable for Non-contiguous write/read Addresses
- Publication number 20160110113
- Publication date Apr 21, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Sundarrajan Rangachari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ASYNCHRONOUS FIFO CIRCUIT
- Publication number 20160035399
- Publication date Feb 4, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Rakesh Channabasappa Yaraduyathinahalli
- G11 - INFORMATION STORAGE

Rakesh Channabasappa Yaraduyathinahalli

Person

Patents Grantslast 30 patents

Testing read-only memory using memory built-in self-test controller

Testing read-only memory using memory built-in self-test controller

Memory compression operable for non-contiguous write/read addresses

Memory compression operable for non-contiguous write/read addresses

Memory compression operable for non-contiguous write/read addresses

System and method for fast modification of register content

Method and apparatus for asynchronous FIFO circuit

Patents Applicationslast 30 patents

TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER

TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER

MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES

MEMORY COMPRESSION OPERABLE FOR NON-CONTIGUOUS WRITE/READ ADDRESSES

SYSTEM AND METHOD FOR FAST MODIFICATION OF REGISTER CONTENT

Memory Compression Operable for Non-contiguous write/read Addresses

METHOD AND APPARATUS FOR ASYNCHRONOUS FIFO CIRCUIT