Rakesh Kumar SINHA

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Clock buffering to reduce memory hold time
- Patent number 10,901,454
- Issue date Jan 26, 2021
- QUALCOMM Incorporated
- Shiba Narayan Mohanty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boost generation circuitry for memory
- Patent number 10,614,865
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Shiba Narayan Mohanty
- G11 - INFORMATION STORAGE
Information Patent Grant
Robust write driver scheme for static random access memory compilers
- Patent number 10,147,483
- Issue date Dec 4, 2018
- QUALCOMM Incorporated
- Shiba Narayan Mohanty
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient memory bank design
- Patent number 10,140,044
- Issue date Nov 27, 2018
- QUALCOMM Incorporated
- Priyankar Mathuria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing design for testability (DFT)...
- Patent number 9,947,419
- Issue date Apr 17, 2018
- QUALCOMM Incorporated
- Rakesh Kumar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline precharge control and tracking scheme providing increased m...
- Patent number 9,928,889
- Issue date Mar 27, 2018
- Qualcomm Incorporation
- Mukund Narasimhan
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit writability implementation for memories
- Patent number 9,875,776
- Issue date Jan 23, 2018
- QUALCOMM Incorporated
- Priyankar Mathuria
- G11 - INFORMATION STORAGE
Information Patent Grant
Boost charge recycle for low-power memory
- Patent number 9,875,790
- Issue date Jan 23, 2018
- QUALCOMM Incorporated
- Rakesh Kumar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for controlling boost capacitance for low powe...
- Patent number 9,837,144
- Issue date Dec 5, 2017
- QUALCOMM Incorporated
- Rakesh Kumar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory timing circuit
- Patent number 9,111,589
- Issue date Aug 18, 2015
- QUALCOMM Incorporated
- Rakesh Kumar Sinha
- G11 - INFORMATION STORAGE
Information Patent Grant
Read/write assist for memories
- Patent number 9,030,863
- Issue date May 12, 2015
- QUALCOMM Incorporated
- Chirag Gulati
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with multiple word line design
- Patent number 8,929,153
- Issue date Jan 6, 2015
- QUALCOMM Incorporated
- Chirag Gulati
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CLOCK BUFFERING TO REDUCE MEMORY HOLD TIME
- Publication number 20200249716
- Publication date Aug 6, 2020
- QUALCOMM Incorporated
- Shiba Narayan Mohanty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOST GENERATION CIRCUITRY FOR MEMORY
- Publication number 20200126604
- Publication date Apr 23, 2020
- QUALCOMM Incorporated
- Shiba Narayan MOHANTY
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT MEMORY BANK DESIGN
- Publication number 20170285998
- Publication date Oct 5, 2017
- QUALCOMM Incorporated
- Priyankar MATHURIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ/WRITE ASSIST FOR MEMORIES
- Publication number 20150085568
- Publication date Mar 26, 2015
- QUALCOMM Incorporated
- Chirag GULATI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TIMING CIRCUIT
- Publication number 20150063046
- Publication date Mar 5, 2015
- QUALCOMM Incorporated
- Rakesh Kumar SINHA
- G11 - INFORMATION STORAGE

Rakesh Kumar SINHA

Person

Patents Grantslast 30 patents

Clock buffering to reduce memory hold time

Boost generation circuitry for memory

Robust write driver scheme for static random access memory compilers

Efficient memory bank design

Apparatus and method for implementing design for testability (DFT)...

Bitline precharge control and tracking scheme providing increased m...

Bit writability implementation for memories

Boost charge recycle for low-power memory

Apparatus and method for controlling boost capacitance for low powe...

Memory timing circuit

Read/write assist for memories

Memory with multiple word line design

Patents Applicationslast 30 patents

CLOCK BUFFERING TO REDUCE MEMORY HOLD TIME

BOOST GENERATION CIRCUITRY FOR MEMORY

EFFICIENT MEMORY BANK DESIGN

READ/WRITE ASSIST FOR MEMORIES

MEMORY TIMING CIRCUIT