Rakesh L. Notani

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory channels calibration during boot wherein channels are calibr...
- Patent number 11,875,871
- Issue date Jan 16, 2024
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory subsystem calibration using substitute results
- Patent number 11,776,597
- Issue date Oct 3, 2023
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory channels calibration during boot wherein channels are calibr...
- Patent number 11,527,269
- Issue date Dec 13, 2022
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective reference voltage calibration in memory subsystem
- Patent number 11,501,820
- Issue date Nov 15, 2022
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Filtering memory calibration
- Patent number 11,226,752
- Issue date Jan 18, 2022
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write/read turn techniques based on latency tolerance
- Patent number 11,221,798
- Issue date Jan 11, 2022
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory subsystem calibration using substitute results
- Patent number 11,217,285
- Issue date Jan 4, 2022
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory calibration with end point replay
- Patent number 10,991,403
- Issue date Apr 27, 2021
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
System for managing memory devices
- Patent number 10,877,688
- Issue date Dec 29, 2020
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for optimizing calibrations of a memory subsystem
- Patent number 10,872,652
- Issue date Dec 22, 2020
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duty cycle correction with read and write calibration
- Patent number 10,734,983
- Issue date Aug 4, 2020
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory arbitration techniques based on latency tolerance
- Patent number 10,545,701
- Issue date Jan 28, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reference voltage calibration using a qualified weighted average
- Patent number 10,515,028
- Issue date Dec 24, 2019
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for interrupting memory bank refresh
- Patent number 10,510,396
- Issue date Dec 17, 2019
- Apple Inc.
- Rakesh L. Notani
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage prediction in memory subsystem
- Patent number 10,408,863
- Issue date Sep 10, 2019
- Apple Inc.
- Robert E. Jeter
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for reducing performance state change latency
- Patent number 10,402,121
- Issue date Sep 3, 2019
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for dynamically switching memory performance st...
- Patent number 10,175,905
- Issue date Jan 8, 2019
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive calibration scheduling for a memory subsystem based on cal...
- Patent number 10,083,736
- Issue date Sep 25, 2018
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage calibration using a qualified weighted average
- Patent number 10,019,387
- Issue date Jul 10, 2018
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods using neighboring sample points in memory subsy...
- Patent number 9,990,973
- Issue date Jun 5, 2018
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for calibrating memory using credit-based segment...
- Patent number 9,928,890
- Issue date Mar 27, 2018
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory calibration abort
- Patent number 9,891,853
- Issue date Feb 13, 2018
- Apple Inc.
- Neeraj Parik
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical feedback-controlled oscillator techniques
- Patent number 9,698,797
- Issue date Jul 4, 2017
- Apple Inc.
- Manu Gulati
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for restricted range memory calibration
- Patent number 9,691,470
- Issue date Jun 27, 2017
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Conditional reference voltage calibration of a memory system in dat...
- Patent number 9,672,882
- Issue date Jun 6, 2017
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for memory calibration averaging
- Patent number 9,666,264
- Issue date May 30, 2017
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-calibration for multiple performance states
- Patent number 9,640,244
- Issue date May 2, 2017
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Conditional memory calibration cancellation
- Patent number 9,396,778
- Issue date Jul 19, 2016
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller half-clock delay adjustment
- Patent number 9,286,961
- Issue date Mar 15, 2016
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for delay compensation in data transmission
- Patent number 9,209,961
- Issue date Dec 8, 2015
- Apple Inc.
- Rakesh L. Notani
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Memory Subsystem Calibration Using Substitute Results
- Publication number 20240062792
- Publication date Feb 22, 2024
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Calibration During Boot
- Publication number 20230115215
- Publication date Apr 13, 2023
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selective Reference Voltage Calibration in Memory Subsystem
- Publication number 20220270664
- Publication date Aug 25, 2022
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Subsystem Calibration Using Substitute Results
- Publication number 20220189519
- Publication date Jun 16, 2022
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Calibration During Boot
- Publication number 20210183414
- Publication date Jun 17, 2021
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FILTERING MEMORY CALIBRATION
- Publication number 20200285406
- Publication date Sep 10, 2020
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Calibration with End Point Replay
- Publication number 20200265881
- Publication date Aug 20, 2020
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
Duty Cycle Correction with Read and Write Calibration
- Publication number 20200266810
- Publication date Aug 20, 2020
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE/READ TURN TECHNIQUES BASED ON LATENCY TOLERANCE
- Publication number 20200159463
- Publication date May 21, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE
- Publication number 20200057579
- Publication date Feb 20, 2020
- Apple Inc.
- Gregory S. Mathews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INTERRUPTING MEMORY BANK REFRESH
- Publication number 20190385669
- Publication date Dec 19, 2019
- Apple Inc.
- Rakesh L. Notani
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Optimizing Calibrations of a Memory Subsystem
- Publication number 20190385670
- Publication date Dec 19, 2019
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR REDUCING PERFORMANCE STATE CHANGE LATENCY
- Publication number 20190196740
- Publication date Jun 27, 2019
- Apple Inc.
- Rakesh L. Notani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reference Voltage Prediction in Memory Subsystem
- Publication number 20190187189
- Publication date Jun 20, 2019
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
REFERENCE VOLTAGE CALIBRATION USING A QUALIFIED WEIGHTED AVERAGE
- Publication number 20190042492
- Publication date Feb 7, 2019
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DYNAMICALLY SWITCHING MEMORY PERFORMANCE ST...
- Publication number 20180074743
- Publication date Mar 15, 2018
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Calibrating Memory Using Credit-Based Segment...
- Publication number 20180061465
- Publication date Mar 1, 2018
- Apple Inc.
- Robert E. Jeter
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM FOR MANAGING MEMORY DEVICES
- Publication number 20180032281
- Publication date Feb 1, 2018
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFERENCE VOLTAGE CALIBRATION USING A QUALIFIED WEIGHTED AVERAGE
- Publication number 20160292094
- Publication date Oct 6, 2016
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC DATA STROBE DETECTION
- Publication number 20130064025
- Publication date Mar 14, 2013
- Hao Chen
- G06 - COMPUTING CALCULATING COUNTING

Rakesh L. Notani

Person

Patents Grantslast 30 patents

Memory channels calibration during boot wherein channels are calibr...

Memory subsystem calibration using substitute results

Memory channels calibration during boot wherein channels are calibr...

Selective reference voltage calibration in memory subsystem

Filtering memory calibration

Write/read turn techniques based on latency tolerance

Memory subsystem calibration using substitute results

Memory calibration with end point replay

System for managing memory devices

Method and apparatus for optimizing calibrations of a memory subsystem

Duty cycle correction with read and write calibration

Memory arbitration techniques based on latency tolerance

Reference voltage calibration using a qualified weighted average

Method and apparatus for interrupting memory bank refresh

Reference voltage prediction in memory subsystem

Systems and methods for reducing performance state change latency

Systems and methods for dynamically switching memory performance st...

Adaptive calibration scheduling for a memory subsystem based on cal...

Reference voltage calibration using a qualified weighted average

Systems and methods using neighboring sample points in memory subsy...

System and method for calibrating memory using credit-based segment...

Memory calibration abort

Hierarchical feedback-controlled oscillator techniques

Apparatus and method for restricted range memory calibration

Conditional reference voltage calibration of a memory system in dat...

Apparatus and method for memory calibration averaging

Pre-calibration for multiple performance states

Conditional memory calibration cancellation

Memory controller half-clock delay adjustment

Method and apparatus for delay compensation in data transmission

Patents Applicationslast 30 patents

Memory Subsystem Calibration Using Substitute Results

Memory Calibration During Boot

Selective Reference Voltage Calibration in Memory Subsystem

Memory Subsystem Calibration Using Substitute Results

Memory Calibration During Boot

FILTERING MEMORY CALIBRATION

Memory Calibration with End Point Replay

Duty Cycle Correction with Read and Write Calibration

WRITE/READ TURN TECHNIQUES BASED ON LATENCY TOLERANCE

MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE

METHOD AND APPARATUS FOR INTERRUPTING MEMORY BANK REFRESH

Method and Apparatus for Optimizing Calibrations of a Memory Subsystem

SYSTEMS AND METHODS FOR REDUCING PERFORMANCE STATE CHANGE LATENCY

Reference Voltage Prediction in Memory Subsystem

REFERENCE VOLTAGE CALIBRATION USING A QUALIFIED WEIGHTED AVERAGE

SYSTEMS AND METHODS FOR DYNAMICALLY SWITCHING MEMORY PERFORMANCE ST...

System and Method for Calibrating Memory Using Credit-Based Segment...

SYSTEM FOR MANAGING MEMORY DEVICES

REFERENCE VOLTAGE CALIBRATION USING A QUALIFIED WEIGHTED AVERAGE

DYNAMIC DATA STROBE DETECTION