Rakesh Mehrotra

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of full semiconductor chip timing closure
- Patent number 7,730,437
- Issue date Jun 1, 2010
- Cypress Semiconductor Corporation
- Purushothaman Ramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for providing hybrid clock distribution
- Patent number 7,392,495
- Issue date Jun 24, 2008
- Cypress Semiconductor Corporation
- Nagendra Cherukupalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-bit deskewing of bus signals using a training pattern
- Patent number 7,036,037
- Issue date Apr 25, 2006
- Cypress Semiconductor Corp.
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static timing analysis with simulations on critical path netlists g...
- Patent number 6,553,549
- Issue date Apr 22, 2003
- Cypress Semiconductor Corp.
- Shiva P. Gowni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory architecture
- Patent number 6,400,642
- Issue date Jun 4, 2002
- Cypress Semiconductor Corp.
- Rakesh Mehrotra
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture
- Patent number 6,240,031
- Issue date May 29, 2001
- Cypress Semiconductor Corp.
- Rakesh Mehrotra
- G06 - COMPUTING CALCULATING COUNTING