Ramachandra Divakaruni

Person

Ossining, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple chip bridge connector
- Patent number 10,991,635
- Issue date Apr 27, 2021
- International Business Machines Corporation
- Dale Curtis McHerron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 10,804,166
- Issue date Oct 13, 2020
- ELPIS TECHNOLOGIES INC.
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Third type of metal gate stack for CMOS devices
- Patent number 10,741,554
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET vertical flash memory
- Patent number 10,707,224
- Issue date Jul 7, 2020
- International Business Machines Corporatino
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET with epitaxial source and drain regions and dielectric isola...
- Patent number 10,707,332
- Issue date Jul 7, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted SOI device for reducing parasitic back gate capacitance
- Patent number 10,600,877
- Issue date Mar 24, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-bit electrical fuses
- Patent number 10,586,799
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid aspect ratio trapping
- Patent number 10,559,662
- Issue date Feb 11, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 10,541,177
- Issue date Jan 21, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated strained stacked nanosheet FET
- Patent number 10,522,661
- Issue date Dec 31, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical transistor including controlled gate length and a self-ali...
- Patent number 10,388,795
- Issue date Aug 20, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted SOI device for reducing parasitic back gate capacitance
- Patent number 10,283,602
- Issue date May 7, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated strained stacked nanosheet FET
- Patent number 10,283,625
- Issue date May 7, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Third type of metal gate stack for CMOS devices
- Patent number 10,262,996
- Issue date Apr 16, 2019
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fin isolation by a well trapping fin portion
- Patent number 10,242,980
- Issue date Mar 26, 2019
- International Business Machines Corporation
- Henry K. Utomo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 10,229,857
- Issue date Mar 12, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 10,204,836
- Issue date Feb 12, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming an extremely thin silicon-on-insulator (ETSOI) d...
- Patent number 10,170,628
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FINFET CMOS with Si NFET and SiGe PFET
- Patent number 10,170,372
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-bit electrical fuses
- Patent number 10,141,320
- Issue date Nov 27, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET with epitaxial source and drain regions and dielectric isola...
- Patent number 10,084,067
- Issue date Sep 25, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked nanowire devices
- Patent number 10,062,615
- Issue date Aug 28, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET vertical flash memory
- Patent number 10,002,876
- Issue date Jun 19, 2018
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted SOI device for reducing parasitic back gate capacitance
- Patent number 9,997,606
- Issue date Jun 12, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated strained stacked nanosheet FET
- Patent number 9,997,618
- Issue date Jun 12, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming nanotips
- Patent number 9,966,253
- Issue date May 8, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor strap connection structure and fabrication method
- Patent number 9,960,168
- Issue date May 1, 2018
- GLOBALFOUNDRIES Inc.
- Veeraraghavan S. Basker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical transistor including controlled gate length and a self-ali...
- Patent number 9,954,109
- Issue date Apr 24, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 9,929,060
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Porous silicon relaxation medium for dislocation free CMOS devices
- Patent number 9,917,021
- Issue date Mar 13, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ACTIVE BRIDGE FOR CHIPLET AND MODULE INTER-COMMUNICATION
- Publication number 20240103065
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Arvind Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CHIP HIGH MEMORY BANDWIDTH CONFIGURATION
- Publication number 20230197595
- Publication date Jun 22, 2023
- International Business Machines Corporation
- Katsuyuki Sakuma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NVM-BASED HIGH-CAPACITY NEURAL NETWORK INFERENCE ENGINE
- Publication number 20220318603
- Publication date Oct 6, 2022
- International Business Machines Corporation
- Arvind Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE CHIP BRIDGE CONNECTOR
- Publication number 20210020529
- Publication date Jan 21, 2021
- International Business Machines Corporation
- Dale Curtis McHerron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
- Publication number 20200043811
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIRD TYPE OF METAL GATE STACK FOR CMOS DEVICES
- Publication number 20190206866
- Publication date Jul 4, 2019
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE
- Publication number 20190189761
- Publication date Jun 20, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
- Publication number 20190109056
- Publication date Apr 11, 2019
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE-BIT ELECTRICAL FUSES
- Publication number 20180323202
- Publication date Nov 8, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE-BIT ELECTRICAL FUSES
- Publication number 20180323203
- Publication date Nov 8, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET WITH EPITAXIAL SOURCE AND DRAIN REGIONS AND DIELECTRIC ISOLA...
- Publication number 20180323288
- Publication date Nov 8, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET VERTICAL FLASH MEMORY
- Publication number 20180269220
- Publication date Sep 20, 2018
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated strained stacked nanosheet FET
- Publication number 20180212035
- Publication date Jul 26, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE
- Publication number 20180204921
- Publication date Jul 19, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL TRANSISTOR INCLUDING CONTROLLED GATE LENGTH AND A SELF-ALI...
- Publication number 20180175212
- Publication date Jun 21, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
- Publication number 20180138095
- Publication date May 17, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
- Publication number 20180122712
- Publication date May 3, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCED PARASITIC CAPACITANCE AND CONTACT RESISTANCE IN ETSOI DEVICES
- Publication number 20180114865
- Publication date Apr 26, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated strained stacked nanosheet FET
- Publication number 20180108751
- Publication date Apr 19, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE
- Publication number 20180097076
- Publication date Apr 5, 2018
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL TRANSISTOR INCLUDING CONTROLLED GATE LENGTH AND A SELF-ALI...
- Publication number 20170323977
- Publication date Nov 9, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated strained stacked nanosheet FET
- Publication number 20170323952
- Publication date Nov 9, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated strained stacked nanosheet FET
- Publication number 20170323953
- Publication date Nov 9, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED NANOWIRE DEVICES
- Publication number 20170294358
- Publication date Oct 12, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCED PARASITIC CAPACITANCE AND CONTACT RESISTANCE IN ETSOI DEVICES
- Publication number 20170271525
- Publication date Sep 21, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING NANOTIPS
- Publication number 20170250248
- Publication date Aug 31, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED NANOWIRE DEVICES
- Publication number 20170229538
- Publication date Aug 10, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIRD TYPE OF METAL GATE STACK FOR CMOS DEVICES
- Publication number 20170229458
- Publication date Aug 10, 2017
- International Business Machines Corporation
- Ramachandra Divakaruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID ASPECT RATIO TRAPPING
- Publication number 20170194435
- Publication date Jul 6, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARTIALLY DIELECTRIC ISOLATED FIN-SHAPED FIELD EFFECT TRANSISTOR (F...
- Publication number 20170170323
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS

Ramachandra Divakaruni

Person

Patents Grantslast 30 patents

Multiple chip bridge connector

Porous silicon relaxation medium for dislocation free CMOS devices

Third type of metal gate stack for CMOS devices

FinFET vertical flash memory

FinFET with epitaxial source and drain regions and dielectric isola...

Fully depleted SOI device for reducing parasitic back gate capacitance

Multiple-bit electrical fuses

Hybrid aspect ratio trapping

Porous silicon relaxation medium for dislocation free CMOS devices

Integrated strained stacked nanosheet FET

Vertical transistor including controlled gate length and a self-ali...

Fully depleted SOI device for reducing parasitic back gate capacitance

Integrated strained stacked nanosheet FET

Third type of metal gate stack for CMOS devices

Semiconductor fin isolation by a well trapping fin portion

Porous silicon relaxation medium for dislocation free CMOS devices

Porous silicon relaxation medium for dislocation free CMOS devices

Method for forming an extremely thin silicon-on-insulator (ETSOI) d...

FINFET CMOS with Si NFET and SiGe PFET

Multiple-bit electrical fuses

FinFET with epitaxial source and drain regions and dielectric isola...

Stacked nanowire devices

FinFET vertical flash memory

Fully depleted SOI device for reducing parasitic back gate capacitance

Integrated strained stacked nanosheet FET

Forming nanotips

Capacitor strap connection structure and fabrication method

Vertical transistor including controlled gate length and a self-ali...

Porous silicon relaxation medium for dislocation free CMOS devices

Porous silicon relaxation medium for dislocation free CMOS devices

Patents Applicationslast 30 patents

ACTIVE BRIDGE FOR CHIPLET AND MODULE INTER-COMMUNICATION

MULTI-CHIP HIGH MEMORY BANDWIDTH CONFIGURATION

NVM-BASED HIGH-CAPACITY NEURAL NETWORK INFERENCE ENGINE

MULTIPLE CHIP BRIDGE CONNECTOR

POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES

THIRD TYPE OF METAL GATE STACK FOR CMOS DEVICES

FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE

POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES

MULTIPLE-BIT ELECTRICAL FUSES

MULTIPLE-BIT ELECTRICAL FUSES

FINFET WITH EPITAXIAL SOURCE AND DRAIN REGIONS AND DIELECTRIC ISOLA...

FINFET VERTICAL FLASH MEMORY

Integrated strained stacked nanosheet FET

FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE

VERTICAL TRANSISTOR INCLUDING CONTROLLED GATE LENGTH AND A SELF-ALI...

POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES

POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES

REDUCED PARASITIC CAPACITANCE AND CONTACT RESISTANCE IN ETSOI DEVICES

Integrated strained stacked nanosheet FET

FULLY DEPLETED SOI DEVICE FOR REDUCING PARASITIC BACK GATE CAPACITANCE

VERTICAL TRANSISTOR INCLUDING CONTROLLED GATE LENGTH AND A SELF-ALI...

Integrated strained stacked nanosheet FET

Integrated strained stacked nanosheet FET

STACKED NANOWIRE DEVICES

REDUCED PARASITIC CAPACITANCE AND CONTACT RESISTANCE IN ETSOI DEVICES

FORMING NANOTIPS

STACKED NANOWIRE DEVICES

THIRD TYPE OF METAL GATE STACK FOR CMOS DEVICES

HYBRID ASPECT RATIO TRAPPING

PARTIALLY DIELECTRIC ISOLATED FIN-SHAPED FIELD EFFECT TRANSISTOR (F...