Rami RAHIM

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Centralized memory allocation with write pointer drift correction
- Patent number 9,361,225
- Issue date Jun 7, 2016
- Juniper Networks, Inc.
- Rami Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Centralized memory allocation with write pointer drift correction
- Patent number 8,880,808
- Issue date Nov 4, 2014
- Juniper Networks, Inc.
- Rami Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reorder engine with error recovery
- Patent number 8,879,560
- Issue date Nov 4, 2014
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Context-switched multi-stream pipelined reorder engine
- Patent number 8,737,403
- Issue date May 27, 2014
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Context-switched multi-stream pipelined reorder engine
- Patent number 8,102,858
- Issue date Jan 24, 2012
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data verification using signature
- Patent number 8,089,861
- Issue date Jan 3, 2012
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for improving packet scheduling accuracy
- Patent number 7,978,609
- Issue date Jul 12, 2011
- Juniper Networks, Inc.
- Sreeram Veeragandham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reorder engine with error recovery
- Patent number 7,974,291
- Issue date Jul 5, 2011
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical policers for enforcing differentiated traffic behavior
- Patent number 7,787,472
- Issue date Aug 31, 2010
- Juniper Networks, Inc.
- James Washburn
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reorder engine with error recovery
- Patent number 7,613,192
- Issue date Nov 3, 2009
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Context-switched multi-stream pipelined reorder engine
- Patent number 7,577,149
- Issue date Aug 18, 2009
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for improving packet scheduling accuracy
- Patent number 7,554,919
- Issue date Jun 30, 2009
- Juniper Networks, Inc.
- Sreeram Veeragandham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Incrementing successive write operations to a plurality of memory d...
- Patent number 7,421,564
- Issue date Sep 2, 2008
- Juniper Networks, Inc.
- Rami Rahim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data verification using signature
- Patent number 7,406,089
- Issue date Jul 29, 2008
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical policers for enforcing differentiated traffic behavior
- Patent number 7,307,949
- Issue date Dec 11, 2007
- Juniper Networks, Inc.
- James Washburn
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reorder engine with error recovery
- Patent number 7,209,482
- Issue date Apr 24, 2007
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory allocation using a memory address pool
- Patent number 7,171,530
- Issue date Jan 30, 2007
- Juniper Networks, Inc.
- Jorge Cruz-Rios
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context-switched multi-stream pipelined reorder engine
- Patent number 7,085,274
- Issue date Aug 1, 2006
- Juniper Networks, Inc.
- Rami Rahim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory allocation using a memory address pool
- Patent number 7,039,774
- Issue date May 2, 2006
- Juniper Networks, Inc.
- Jorge Cruz-Rios
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Centralized memory allocation with write pointer drift correction
- Patent number 7,032,082
- Issue date Apr 18, 2006
- Juniper Networks, Inc.
- Rami Rahim
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CENTRALIZED MEMORY ALLOCATION WITH WRITE POINTER DRIFT CORRECTION
- Publication number 20150052316
- Publication date Feb 19, 2015
- Juniper Networks, Inc.
- Rami RAHIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT-SWITCHED MULTI-STREAM PIPELINED REORDER ENGINE
- Publication number 20120087374
- Publication date Apr 12, 2012
- Juniper Networks, Inc.
- Rami RAHIM
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REORDER ENGINE WITH ERROR RECOVERY
- Publication number 20110228784
- Publication date Sep 22, 2011
- Juniper Networks, Inc.
- Rami RAHIM
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIERARCHICAL POLICERS FOR ENFORCING DIFFERENTIATED TRAFFIC BEHAVIOR
- Publication number 20100290342
- Publication date Nov 18, 2010
- Juniper Networks, Inc.
- James WASHBURN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING PACKET SCHEDULING ACCURACY
- Publication number 20090245246
- Publication date Oct 1, 2009
- Juniper Networks, Inc.
- Sreeram Veeragandham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIERARCHICAL POLICERS FOR ENFORCING DIFFERENTIATED TRAFFIC BEHAVIOR
- Publication number 20080056268
- Publication date Mar 6, 2008
- Juniper Networks, Inc.
- James WASHBURN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Centralized memory allocation with write pointer drift correction

Centralized memory allocation with write pointer drift correction

Reorder engine with error recovery

Context-switched multi-stream pipelined reorder engine

Context-switched multi-stream pipelined reorder engine

Data verification using signature

Systems and methods for improving packet scheduling accuracy

Reorder engine with error recovery

Hierarchical policers for enforcing differentiated traffic behavior

Reorder engine with error recovery

Context-switched multi-stream pipelined reorder engine

Systems and methods for improving packet scheduling accuracy

Incrementing successive write operations to a plurality of memory d...

Data verification using signature

Hierarchical policers for enforcing differentiated traffic behavior

Reorder engine with error recovery

Memory allocation using a memory address pool

Context-switched multi-stream pipelined reorder engine

Memory allocation using a memory address pool

Centralized memory allocation with write pointer drift correction

Patents Applicationslast 30 patents

CENTRALIZED MEMORY ALLOCATION WITH WRITE POINTER DRIFT CORRECTION

CONTEXT-SWITCHED MULTI-STREAM PIPELINED REORDER ENGINE

REORDER ENGINE WITH ERROR RECOVERY

HIERARCHICAL POLICERS FOR ENFORCING DIFFERENTIATED TRAFFIC BEHAVIOR

SYSTEMS AND METHODS FOR IMPROVING PACKET SCHEDULING ACCURACY

HIERARCHICAL POLICERS FOR ENFORCING DIFFERENTIATED TRAFFIC BEHAVIOR