Raminderpal Singh

Person

Essex Junction, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for evaluating a machine tool operating character...
- Patent number 8,594,826
- Issue date Nov 26, 2013
- International Business Machines Corporation
- Ehud Aharoni
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and system for evaluating a machine tool operating character...
- Patent number 8,285,414
- Issue date Oct 9, 2012
- International Business Machines Corporation
- Ehud Aharoni
- G05 - CONTROLLING REGULATING
Information Patent Grant
Bias-controlled deep trench substrate noise isolation integrated ci...
- Patent number 8,212,332
- Issue date Jul 3, 2012
- International Business Machines Corporation
- Phillip Francis Chapman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bias-controlled deep trench substrate noise isolation integrated ci...
- Patent number 8,021,941
- Issue date Sep 20, 2011
- International Business Machines Corporation
- Phillip Francis Chapman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for providing noise suppression in an integrat...
- Patent number 7,309,898
- Issue date Dec 18, 2007
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of checking the layout versus the schematic of multi-fingere...
- Patent number 7,139,990
- Issue date Nov 21, 2006
- International Business Machines Corporation
- Raminderpal Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for optimal use of direct fit and interpolated models in sch...
- Patent number 7,089,512
- Issue date Aug 8, 2006
- International Business Machines Corporation
- Joseph A. Iadanza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing noise suppression in a integrate...
- Patent number 7,020,857
- Issue date Mar 28, 2006
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing an integrated circuit having multiple voltage...
- Patent number 7,000,214
- Issue date Feb 14, 2006
- International Business Machines Corporation
- Joseph A. Iadanza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, program product, and design tool for automatic transmission...
- Patent number 6,954,920
- Issue date Oct 11, 2005
- International Business Machines Corporation
- Peter J. Jenkins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for low noise integrated circuit design
- Patent number 6,950,997
- Issue date Sep 27, 2005
- International Business Machines Corporation
- Carl E. Dickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for integrated circuit design
- Patent number 6,865,725
- Issue date Mar 8, 2005
- International Business Machines Corporation
- Carl E. Dickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing ESD protection and/or noise redu...
- Patent number 6,826,025
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On chip resistor calibration structure and method
- Patent number 6,825,490
- Issue date Nov 30, 2004
- International Business Machines Corporation
- Terence B. Hook
- G01 - MEASURING TESTING
Information Patent Grant
Multiple chip guard rings for integrated circuit and chip guard rin...
- Patent number 6,744,112
- Issue date Jun 1, 2004
- International Business Machines Corporation
- Jeffrey B. Johnson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTER...
- Publication number 20130006406
- Publication date Jan 3, 2013
- International Business Machines Corporation
- Ehud Aharoni
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
BIAS-CONTROLLED DEEP TRENCH SUBSTRATE NOISE ISOLATION INTEGRATED CI...
- Publication number 20110291238
- Publication date Dec 1, 2011
- International Business Machines Corporation
- Phillip Francis Chapman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BIAS-CONTROLLED DEEP TRENCH SUBSTRATE NOISE ISOLATION INTEGRATED CI...
- Publication number 20110018094
- Publication date Jan 27, 2011
- International Business Machines Corporation
- Phillip Francis Chapman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTER...
- Publication number 20100249976
- Publication date Sep 30, 2010
- International Business Machines Corporation
- Ehud Aharoni
- G05 - CONTROLLING REGULATING
Information Patent Application
Method, Computer Program and System Providing for Semiconductor Pro...
- Publication number 20090031260
- Publication date Jan 29, 2009
- Matthew Angyal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of checking the layout versus the schematic of multi-fingere...
- Publication number 20050216873
- Publication date Sep 29, 2005
- Raminderpal Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR OPTIMAL USE OF DIRECT FIT AND INTERPOLATED MODELS IN SCH...
- Publication number 20050204318
- Publication date Sep 15, 2005
- International Business Machines Corporation
- Joseph A. Iadanza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR DESIGNING AN INTEGRATED CIRCUIT HAVING MULTIPLE VOLTAGE...
- Publication number 20050108667
- Publication date May 19, 2005
- International Business Machines Corporation
- Joseph A. Iadanza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vertically-stacked co-planar transmission line structure for IC design
- Publication number 20050062137
- Publication date Mar 24, 2005
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, PROGRAM PRODUCT, AND DESIGN TOOL FOR AUTOMATIC TRANSMISSION...
- Publication number 20040268285
- Publication date Dec 30, 2004
- International Business Machines Corporation
- Peter J Jenkins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR LOW NOISE INTEGRATED CIRCUIT DESIGN
- Publication number 20040216060
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Carl E Dickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR INTEGRATED CIRCUIT DESIGN
- Publication number 20040216063
- Publication date Oct 28, 2004
- International Business Machines Corporation
- Carl E. Dickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE CHIP GUARD RINGS FOR INTEGRATED CIRCUIT AND CHIP GUARD RIN...
- Publication number 20040061183
- Publication date Apr 1, 2004
- International Business Machines Corporation
- Jeffrey B. Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for providing ESD protection and/or noise redu...
- Publication number 20030214767
- Publication date Nov 20, 2003
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for providing noise suppression in an integrat...
- Publication number 20030214348
- Publication date Nov 20, 2003
- International Business Machines Corporation
- Raminderpal Singh
- H01 - BASIC ELECTRIC ELEMENTS

Raminderpal Singh

Person

Patents Grantslast 30 patents

Method and system for evaluating a machine tool operating character...

Method and system for evaluating a machine tool operating character...

Bias-controlled deep trench substrate noise isolation integrated ci...

Bias-controlled deep trench substrate noise isolation integrated ci...

Method and apparatus for providing noise suppression in an integrat...

Method of checking the layout versus the schematic of multi-fingere...

Method for optimal use of direct fit and interpolated models in sch...

Method and apparatus for providing noise suppression in a integrate...

Method for designing an integrated circuit having multiple voltage...

Method, program product, and design tool for automatic transmission...

Method and system for low noise integrated circuit design

Method and system for integrated circuit design

Method and apparatus for providing ESD protection and/or noise redu...

On chip resistor calibration structure and method

Multiple chip guard rings for integrated circuit and chip guard rin...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTER...

BIAS-CONTROLLED DEEP TRENCH SUBSTRATE NOISE ISOLATION INTEGRATED CI...

BIAS-CONTROLLED DEEP TRENCH SUBSTRATE NOISE ISOLATION INTEGRATED CI...

METHOD AND SYSTEM FOR EVALUATING A MACHINE TOOL OPERATING CHARACTER...

Method, Computer Program and System Providing for Semiconductor Pro...

Method of checking the layout versus the schematic of multi-fingere...

METHOD FOR OPTIMAL USE OF DIRECT FIT AND INTERPOLATED MODELS IN SCH...

METHOD FOR DESIGNING AN INTEGRATED CIRCUIT HAVING MULTIPLE VOLTAGE...

Vertically-stacked co-planar transmission line structure for IC design

METHOD, PROGRAM PRODUCT, AND DESIGN TOOL FOR AUTOMATIC TRANSMISSION...

METHOD AND SYSTEM FOR LOW NOISE INTEGRATED CIRCUIT DESIGN

METHOD AND SYSTEM FOR INTEGRATED CIRCUIT DESIGN

MULTIPLE CHIP GUARD RINGS FOR INTEGRATED CIRCUIT AND CHIP GUARD RIN...

Method and apparatus for providing ESD protection and/or noise redu...

Method and apparatus for providing noise suppression in an integrat...