Ramon Mangaser

Person

Boston, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Noise mitigation in single-ended links
- Patent number 12,101,135
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-level signal reception
- Patent number 12,093,124
- Issue date Sep 17, 2024
- Advanced Micro Devices, Inc.
- Aaron D Willey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock gating using a cascaded clock gating control signal
- Patent number 12,088,296
- Issue date Sep 10, 2024
- Advanced Micro Devices, Inc.
- Ramon A. Mangaser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual phase clock distribution from a single source in a die-to-die...
- Patent number 12,015,412
- Issue date Jun 18, 2024
- Advanced Micro Devices, Inc.
- Srikanth Reddy Gruddanti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Skew matching in a die-to-die interface
- Patent number 11,960,435
- Issue date Apr 16, 2024
- Advanced Micro Devices, Inc.
- Pradeep Jayaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise mitigation in single ended links
- Patent number 11,757,489
- Issue date Sep 12, 2023
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and apparatus for using DFE in a system with non-continuous...
- Patent number 8,553,754
- Issue date Oct 8, 2013
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
MULTI-PHASE CLOCK GATING WITH PHASE SELECTION
- Publication number 20240223192
- Publication date Jul 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Pradeep Jayaraman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL PHASE CLOCK DISTRIBUTION FROM A SINGLE SOURCE IN A DIE-TO-DIE...
- Publication number 20240186994
- Publication date Jun 6, 2024
- ADVANCED MICRO DEVICES, INC.
- SRIKANTH REDDY GRUDDANTI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-LEVEL SIGNAL RECEPTION
- Publication number 20240111618
- Publication date Apr 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Aaron D. Willey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE MITIGATION IN SINGLE-ENDED LINKS
- Publication number 20230421203
- Publication date Dec 28, 2023
- ADVANCED MICRO DEVICES, INC.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EFFICIENT AND LOW POWER REFERENCE VOLTAGE MIXING
- Publication number 20230290400
- Publication date Sep 14, 2023
- ADVANCED MICRO DEVICES, INC.
- Aaron D Willey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SKEW MATCHING IN A DIE-TO-DIE INTERFACE
- Publication number 20230195678
- Publication date Jun 22, 2023
- ADVANCED MICRO DEVICES, INC.
- PRADEEP JAYARAMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GATING USING A CASCADED CLOCK GATING CONTROL SIGNAL
- Publication number 20230198527
- Publication date Jun 22, 2023
- ADVANCED MICRO DEVICES, INC.
- RAMON A. MANGASER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE MITIGATION IN SINGLE ENDED LINKS
- Publication number 20230046477
- Publication date Feb 16, 2023
- ADVANCED MICRO DEVICES, INC.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR USING DFE IN A SYSTEM WITH NON-CONTINUOUS...
- Publication number 20120155529
- Publication date Jun 21, 2012
- Advanced Micro Devices, Inc.
- Ramon Mangaser
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Ramon Mangaser

Person

Patents Grantslast 30 patents

Noise mitigation in single-ended links

Multi-level signal reception

Clock gating using a cascaded clock gating control signal

Dual phase clock distribution from a single source in a die-to-die...

Skew matching in a die-to-die interface

Noise mitigation in single ended links

Method and apparatus for using DFE in a system with non-continuous...

Patents Applicationslast 30 patents

MULTI-PHASE CLOCK GATING WITH PHASE SELECTION

DUAL PHASE CLOCK DISTRIBUTION FROM A SINGLE SOURCE IN A DIE-TO-DIE...

MULTI-LEVEL SIGNAL RECEPTION

NOISE MITIGATION IN SINGLE-ENDED LINKS

EFFICIENT AND LOW POWER REFERENCE VOLTAGE MIXING

SKEW MATCHING IN A DIE-TO-DIE INTERFACE

CLOCK GATING USING A CASCADED CLOCK GATING CONTROL SIGNAL

NOISE MITIGATION IN SINGLE ENDED LINKS

METHOD AND APPARATUS FOR USING DFE IN A SYSTEM WITH NON-CONTINUOUS...