Randy R. Mooney

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Beaverton, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Systems, methods, and apparatuses for stacked memory
- Patent number 8,984,189
- Issue date Mar 17, 2015
- Intel Corporation
- Bryan Casper
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, methods, and apparatuses for stacked memory
- Patent number 8,612,809
- Issue date Dec 17, 2013
- Intel Corporation
- Bryan Casper
- G11 - INFORMATION STORAGE
Information Patent Grant
Sampling phase detector for delay-locked loop
- Patent number 7,173,460
- Issue date Feb 6, 2007
- Intel Corporation
- James E. Jaussi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-controlled DLL bias
- Patent number 7,145,373
- Issue date Dec 5, 2006
- Intel Corporation
- James E. Jaussi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HYBRID MEMORY
- Publication number 20120284436
- Publication date Nov 8, 2012
- Bryan Casper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems, methods, and apparatuses for hybrid memory
- Publication number 20110161748
- Publication date Jun 30, 2011
- Bryan Casper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Continuous-time equalizer
- Publication number 20060245485
- Publication date Nov 2, 2006
- Intel Corporation
- Aaron K. Martin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Sampling phase detector for delay-locked loop
- Publication number 20060226881
- Publication date Oct 12, 2006
- Intel Corporation
- James E. Jaussi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Frequency-controlled DLL bias
- Publication number 20060022728
- Publication date Feb 2, 2006
- Intel Corporation
- James E. Jaussi
- H03 - BASIC ELECTRONIC CIRCUITRY