Ranganathan Sankaralingam

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Noida, IN

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Patents Grantslast 30 patents

Information Patent Grant
Optimized mapping of an integrated circuit design to multiple cell...
- Patent number 7,530,047
- Issue date May 5, 2009
- Cadence Design Systems, Inc.
- Qi Wang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Optimized mapping of an integrated circuit design to multiple cell...
- Publication number 20070011643
- Publication date Jan 11, 2007
- Cadence Design Systems, Inc.
- Qi Wang
- G06 - COMPUTING CALCULATING COUNTING