Rangeen Basu Roy Chowdhury

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems, methods and apparatus for speculative elimination of load...
- Patent number 12,169,718
- Issue date Dec 17, 2024
- Intel Corporation
- Vineeth Thamarassery Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of the untranslated to translated code steering logic in...
- Patent number 11,372,775
- Issue date Jun 28, 2022
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-cluster communication of live-in register values
- Patent number 10,437,590
- Issue date Oct 8, 2019
- Intel Corporation
- Sofia Pediaditaki
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Performance Monitoring Emulation in Translated Branch Instructions...
- Publication number 20230315501
- Publication date Oct 5, 2023
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING INSTRUCTIONS FROM SECOND STORAGE TO FIRST STORAGE WHILE FET...
- Publication number 20230315467
- Publication date Oct 5, 2023
- Eliyah Kilada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE-LENGTH INSTRUCTION STEERING TO INSTRUCTION DECODE CLUSTERS
- Publication number 20230315473
- Publication date Oct 5, 2023
- Intel Corporation
- Muhammad Azeem
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STALLING AN INSTRUCTION FETCH OPERATION IMPACTED BY A HAZARD WITHOU...
- Publication number 20230315466
- Publication date Oct 5, 2023
- Eliyah Kilada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technology For Optimizing Memory-To-Register Operations
- Publication number 20220413870
- Publication date Dec 29, 2022
- Intel Corporation
- Vineeth Thamarassery Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE PROFILER TO TRACK INSTRUCTION SEQUENCE INFORMATION INCLUDI...
- Publication number 20200210193
- Publication date Jul 2, 2020
- Intel Corporation
- Sangeeta BHATTACHARYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...
- Publication number 20200174944
- Publication date Jun 4, 2020
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION PINNING IN TRANSLATION LOOKASIDE BUFFERS
- Publication number 20190188154
- Publication date Jun 20, 2019
- Intel Corporation
- Rangeen Basu Roy Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION TABLE ENTRY PREFETCHING IN DYNAMIC BINARY TRANSLATION B...
- Publication number 20190179766
- Publication date Jun 13, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...
- Publication number 20190163642
- Publication date May 30, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTER-CLUSTER COMMUNICATION OF LIVE-IN REGISTER VALUES
- Publication number 20190095203
- Publication date Mar 28, 2019
- Intel Corporation
- Sofia Pediaditaki
- G06 - COMPUTING CALCULATING COUNTING

Rangeen Basu Roy Chowdhury

Person

Patents Grantslast 30 patents

Systems, methods and apparatus for speculative elimination of load...

Management of the untranslated to translated code steering logic in...

Inter-cluster communication of live-in register values

Patents Applicationslast 30 patents

Performance Monitoring Emulation in Translated Branch Instructions...

STORING INSTRUCTIONS FROM SECOND STORAGE TO FIRST STORAGE WHILE FET...

VARIABLE-LENGTH INSTRUCTION STEERING TO INSTRUCTION DECODE CLUSTERS

STALLING AN INSTRUCTION FETCH OPERATION IMPACTED BY A HAZARD WITHOU...

Technology For Optimizing Memory-To-Register Operations

HARDWARE PROFILER TO TRACK INSTRUCTION SEQUENCE INFORMATION INCLUDI...

MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...

TRANSLATION PINNING IN TRANSLATION LOOKASIDE BUFFERS

TRANSLATION TABLE ENTRY PREFETCHING IN DYNAMIC BINARY TRANSLATION B...

MANAGEMENT OF THE UNTRANSLATED TO TRANSLATED CODE STEERING LOGIC IN...

INTER-CLUSTER COMMUNICATION OF LIVE-IN REGISTER VALUES