Ranjith KUMAR

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi version library cell handling and integrated circuit structur...
- Patent number 12,067,338
- Issue date Aug 20, 2024
- Intel Corporation
- Ranjith Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal space centered standard cell architecture to enable higher ce...
- Patent number 11,764,219
- Issue date Sep 19, 2023
- Intel Corporation
- Harshitha Vishwanath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture with power tracks completely inside a cell
- Patent number 11,682,664
- Issue date Jun 20, 2023
- Intel Corporation
- Srinivasa Chaitanya Gadigatla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical integration scheme and circuit elements architecture for a...
- Patent number 11,522,072
- Issue date Dec 6, 2022
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pin must-connects for improved performance
- Patent number 11,409,935
- Issue date Aug 9, 2022
- Intel Corporation
- Ranjith Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi version library cell handling and integrated circuit structur...
- Patent number 11,271,010
- Issue date Mar 8, 2022
- Intel Corporation
- Ranjith Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power shared cell architecture
- Patent number 11,068,640
- Issue date Jul 20, 2021
- Intel Corporation
- Ranjith Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical integration scheme and circuit elements architecture for a...
- Patent number 10,847,635
- Issue date Nov 24, 2020
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical integration scheme and circuit elements architecture for a...
- Patent number 10,304,946
- Issue date May 28, 2019
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20240362391
- Publication date Oct 31, 2024
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...
- Publication number 20230046755
- Publication date Feb 16, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20220149075
- Publication date May 12, 2022
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL SPACE CENTERED STANDARD CELL ARCHITECTURE TO ENABLE HIGHER CE...
- Publication number 20210167066
- Publication date Jun 3, 2021
- Intel Corporation
- Harshitha VISHWANATH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...
- Publication number 20210043755
- Publication date Feb 11, 2021
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...
- Publication number 20200357823
- Publication date Nov 12, 2020
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIN MUST-CONNECTS FOR IMPROVED PERFORMANCE
- Publication number 20200311332
- Publication date Oct 1, 2020
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SHARED CELL ARCHITECTURE
- Publication number 20200279069
- Publication date Sep 3, 2020
- Intel Corporation
- Ranjith KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STANDARD CELL ARCHITECTURE WITH POWER TRACKS COMPLETELY INSIDE A CELL
- Publication number 20200251464
- Publication date Aug 6, 2020
- Intel Corporation
- Srinivasa Chaitanya GADIGATLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH CRENELLATED METAL TRACE LAYOUT
- Publication number 20190312023
- Publication date Oct 10, 2019
- Intel Corporation
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...
- Publication number 20190252525
- Publication date Aug 15, 2019
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...
- Publication number 20180204932
- Publication date Jul 19, 2018
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS

Ranjith KUMAR

Person

Patents Grantslast 30 patents

Multi version library cell handling and integrated circuit structur...

Metal space centered standard cell architecture to enable higher ce...

Standard cell architecture with power tracks completely inside a cell

Vertical integration scheme and circuit elements architecture for a...

Pin must-connects for improved performance

Multi version library cell handling and integrated circuit structur...

Power shared cell architecture

Vertical integration scheme and circuit elements architecture for a...

Vertical integration scheme and circuit elements architecture for a...

Patents Applicationslast 30 patents

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

METAL SPACE CENTERED STANDARD CELL ARCHITECTURE TO ENABLE HIGHER CE...

VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...

MULTI VERSION LIBRARY CELL HANDLING AND INTEGRATED CIRCUIT STRUCTUR...

PIN MUST-CONNECTS FOR IMPROVED PERFORMANCE

POWER SHARED CELL ARCHITECTURE

STANDARD CELL ARCHITECTURE WITH POWER TRACKS COMPLETELY INSIDE A CELL

INTEGRATED CIRCUIT DEVICE WITH CRENELLATED METAL TRACE LAYOUT

VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...

VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR A...