Rasmus Barringer

Person

Helsingborg, SE

People

Patents Grantslast 30 patents

Information Patent Grant
Compressed bounding volume hierarchy
- Patent number 10,600,231
- Issue date Mar 24, 2020
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using cost estimation to improve performance of tile rendering for...
- Patent number 10,134,101
- Issue date Nov 20, 2018
- Intel Corporation
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse rasterization
- Patent number 10,049,486
- Issue date Aug 14, 2018
- Intel Corporation
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decompression and traversal of a bounding volume hierarchy
- Patent number 9,928,640
- Issue date Mar 27, 2018
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse rasterization
- Patent number 9,501,860
- Issue date Nov 22, 2016
- Intel Corporation
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics tiling architecture with bounding volume hierarchies
- Patent number 8,823,736
- Issue date Sep 2, 2014
- Intel Corporation
- Rasmus Barringer
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Tile rendering for image processing
- Patent number 8,593,466
- Issue date Nov 26, 2013
- Intel Corporation
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PARALLEL WORKLOAD SCHEDULING BASED ON WORKLOAD DATA COHERENCE
- Publication number 20240095083
- Publication date Mar 21, 2024
- NVIDIA Corporation
- Martin Stich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED BOUNDING VOLUME HIERARCHY
- Publication number 20200320771
- Publication date Oct 8, 2020
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED BOUNDING VOLUME HIERARCHY
- Publication number 20190259195
- Publication date Aug 22, 2019
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for triangle-pair merging
- Publication number 20170186128
- Publication date Jun 29, 2017
- Tomas G. Akenine-Moller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECOMPRESSION AND TRAVERSAL OF A BOUNDING VOLUME HIERARCHY
- Publication number 20170178387
- Publication date Jun 22, 2017
- Intel Corporation
- Sven Woop
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sparse Rasterization
- Publication number 20170011543
- Publication date Jan 12, 2017
- Intel Corporation
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sparse Rasterization
- Publication number 20150193968
- Publication date Jul 9, 2015
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using Cost Estimation to Improve Performance of Tile Rendering for...
- Publication number 20130335429
- Publication date Dec 19, 2013
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphics Tiling Architecture With Bounding Volume Hierarchies
- Publication number 20130187947
- Publication date Jul 25, 2013
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tile Rendering for Image Processing
- Publication number 20110298813
- Publication date Dec 8, 2011
- Rasmus Barringer
- G06 - COMPUTING CALCULATING COUNTING

Rasmus Barringer

Person

Patents Grantslast 30 patents

Compressed bounding volume hierarchy

Using cost estimation to improve performance of tile rendering for...

Sparse rasterization

Decompression and traversal of a bounding volume hierarchy

Sparse rasterization

Graphics tiling architecture with bounding volume hierarchies

Tile rendering for image processing

Patents Applicationslast 30 patents

PARALLEL WORKLOAD SCHEDULING BASED ON WORKLOAD DATA COHERENCE

COMPRESSED BOUNDING VOLUME HIERARCHY

COMPRESSED BOUNDING VOLUME HIERARCHY

Apparatus and method for triangle-pair merging

DECOMPRESSION AND TRAVERSAL OF A BOUNDING VOLUME HIERARCHY

Sparse Rasterization

Sparse Rasterization

Using Cost Estimation to Improve Performance of Tile Rendering for...

Graphics Tiling Architecture With Bounding Volume Hierarchies

Tile Rendering for Image Processing