Ravi Rajwar

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,612
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,611
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking mode of a processing device in instruction tracing systems
- Patent number 10,331,452
- Issue date Jun 25, 2019
- Intel Corporation
- Thilo Schmitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,261,879
- Issue date Apr 16, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,248,524
- Issue date Apr 2, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Throttling integrated link
- Patent number 10,241,952
- Issue date Mar 26, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,223,227
- Issue date Mar 5, 2019
- Intel Corporation
- Ravi Rajwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,210,065
- Issue date Feb 19, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,210,066
- Issue date Feb 19, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,152,401
- Issue date Dec 11, 2018
- Intel Corporation
- Ravi Rajwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Suspendable load address tracking inside transactions
- Patent number 10,146,538
- Issue date Dec 4, 2018
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Last branch record indicators for transactional memory
- Patent number 10,073,719
- Issue date Sep 11, 2018
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post-retire scheme for tracking tentative accesses during transacti...
- Patent number 9,798,590
- Issue date Oct 24, 2017
- Intel Corporation
- Haitham Akkary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protecting confidential data with transactional processing in execu...
- Patent number 9,665,373
- Issue date May 30, 2017
- Intel Corporation
- Michael Lemay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for continued retirement during commit of a sp...
- Patent number 9,535,744
- Issue date Jan 3, 2017
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to manage speculative execution of object loc...
- Patent number 9,529,645
- Issue date Dec 27, 2016
- Intel Corporation
- Suresh Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method and apparatus for improving transactional memory (TM...
- Patent number 9,411,739
- Issue date Aug 9, 2016
- Intel Corporation
- Omar M. Shaikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Event counter checkpointing and restoring
- Patent number 9,372,764
- Issue date Jun 21, 2016
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Last branch record register for storing taken branch information an...
- Patent number 9,354,878
- Issue date May 31, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to write modified cache data to a backing stor...
- Patent number 9,311,241
- Issue date Apr 12, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid cache state and filter tracking of memory operations during...
- Patent number 9,298,632
- Issue date Mar 29, 2016
- Intel Corporation
- Robert S. Chappell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 9,268,596
- Issue date Feb 23, 2016
- Intel Corparation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Critical section detection and prediction mechanism for hardware lo...
- Patent number 9,262,173
- Issue date Feb 16, 2016
- Intel Corporation
- Haitham Akkary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Copy-on-write buffer for restoring program code from a speculative...
- Patent number 9,182,986
- Issue date Nov 10, 2015
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Throttling integrated link
- Patent number 9,146,610
- Issue date Sep 29, 2015
- Intel Corporation
- Ravi Rajwar
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Throttling integrated link
- Patent number 9,110,666
- Issue date Aug 18, 2015
- Intel Corporation
- Ravi Rajwar
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Vector compare-and-exchange operation
- Patent number 8,996,845
- Issue date Mar 31, 2015
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to bypass object lock by speculative execution...
- Patent number 8,972,994
- Issue date Mar 3, 2015
- Intel Corporation
- Suresh Srinivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Event counter checkpointing and restoring
- Patent number 8,924,692
- Issue date Dec 30, 2014
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debugging parallel software using speculatively executed code seque...
- Patent number 8,881,106
- Issue date Nov 4, 2014
- Intel Corporation
- Peter Lachner
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PRE-POST RETIRE HYBRID HARDWARE LOCK ELISION (HLE) SCHEME
- Publication number 20190065160
- Publication date Feb 28, 2019
- Haitham Akkary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUSPENDABLE LOAD ADDRESS TRACKING INSIDE TRANSACTIONS
- Publication number 20180095759
- Publication date Apr 5, 2018
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-RETIRE SCHEME FOR TRACKING TENTATIVE ACCESSES DURING TRANSACTI...
- Publication number 20180011748
- Publication date Jan 11, 2018
- Intel Corporation
- Haitham Akkary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS, METHODS, AND SYSTEMS TO IDENTIFY STORES THAT CAUSE REMO...
- Publication number 20180004521
- Publication date Jan 4, 2018
- Intel Corporation
- Andreas Kleen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTING AND RE...
- Publication number 20170235580
- Publication date Aug 17, 2017
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-ON-CHIP FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTIN...
- Publication number 20170235638
- Publication date Aug 17, 2017
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTING AND...
- Publication number 20170235579
- Publication date Aug 17, 2017
- Intel Corporation
- Laura A. Knauth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Concurrent Execution of Critical Sections by Eliding Ownership of L...
- Publication number 20170123862
- Publication date May 4, 2017
- Wisconsin Alumni Research Foundation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Method, and Apparatus for Improving Throughput of Consecuti...
- Publication number 20170097891
- Publication date Apr 6, 2017
- Omar M. Shaikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Method, and Apparatus for Improving Throughput of Consecuti...
- Publication number 20170097826
- Publication date Apr 6, 2017
- Omar M. Shaikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTING CONFIDENTIAL DATA WITH TRANSACTIONAL PROCESSING IN EXECU...
- Publication number 20160378490
- Publication date Dec 29, 2016
- Intel Corporation
- MICHAEL LEMAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Method, and Apparatus for Improving Throughput of Consecuti...
- Publication number 20160350221
- Publication date Dec 1, 2016
- Intel Corporation
- Omar M. Shaikh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Speculative Request Support for Prefetching
- Publication number 20160283232
- Publication date Sep 29, 2016
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160266992
- Publication date Sep 15, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160246606
- Publication date Aug 25, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS
- Publication number 20160239304
- Publication date Aug 18, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Last Branch Record Indicators For Transactional Memory
- Publication number 20160232041
- Publication date Aug 11, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160210177
- Publication date Jul 21, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160202987
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction And Logic To Test Transactional Execution Status
- Publication number 20160202979
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160203019
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160203068
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Concurrent Execution of Critical Sections by Eliding Ownership of L...
- Publication number 20160188475
- Publication date Jun 30, 2016
- Wisconsin Alumni Research Foundation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC TO TEST TRANSACTIONAL EXECUTION STATUS
- Publication number 20160188479
- Publication date Jun 30, 2016
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160154648
- Publication date Jun 2, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132335
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparaturs, and system for speculative abort control mechan...
- Publication number 20160132334
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132337
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus, And System For Speculative Abort Control Mechanisms
- Publication number 20160132333
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132336
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING

Ravi Rajwar

Person

Patents Grantslast 30 patents

Apparatus and method for transactional memory and lock elision incl...

Apparatus and method for transactional memory and lock elision incl...

Tracking mode of a processing device in instruction tracing systems

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Throttling integrated link

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Suspendable load address tracking inside transactions

Last branch record indicators for transactional memory

Post-retire scheme for tracking tentative accesses during transacti...

Protecting confidential data with transactional processing in execu...

Method and apparatus for continued retirement during commit of a sp...

Methods and apparatus to manage speculative execution of object loc...

System, method and apparatus for improving transactional memory (TM...

Event counter checkpointing and restoring

Last branch record register for storing taken branch information an...

Method and apparatus to write modified cache data to a backing stor...

Hybrid cache state and filter tracking of memory operations during...

Instruction and logic to test transactional execution status

Critical section detection and prediction mechanism for hardware lo...

Copy-on-write buffer for restoring program code from a speculative...

Throttling integrated link

Throttling integrated link

Vector compare-and-exchange operation

Method and apparatus to bypass object lock by speculative execution...

Event counter checkpointing and restoring

Debugging parallel software using speculatively executed code seque...

Patents Applicationslast 30 patents

PRE-POST RETIRE HYBRID HARDWARE LOCK ELISION (HLE) SCHEME

SUSPENDABLE LOAD ADDRESS TRACKING INSIDE TRANSACTIONS

POST-RETIRE SCHEME FOR TRACKING TENTATIVE ACCESSES DURING TRANSACTI...

PROCESSORS, METHODS, AND SYSTEMS TO IDENTIFY STORES THAT CAUSE REMO...

SYSTEM FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTING AND RE...

SYSTEM-ON-CHIP FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTIN...

PROCESSOR FOR SPECULATIVE EXECUTION EVENT COUNTER CHECKPOINTING AND...

Concurrent Execution of Critical Sections by Eliding Ownership of L...

System, Method, and Apparatus for Improving Throughput of Consecuti...

System, Method, and Apparatus for Improving Throughput of Consecuti...

PROTECTING CONFIDENTIAL DATA WITH TRANSACTIONAL PROCESSING IN EXECU...

System, Method, and Apparatus for Improving Throughput of Consecuti...

Instruction and Logic for Speculative Request Support for Prefetching

Instruction and logic to test transactional execution status

Method, apparatus, and system for speculative abort control mechanisms

METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS

Last Branch Record Indicators For Transactional Memory

Method, apparatus, and system for speculative abort control mechanisms

Instruction and logic to test transactional execution status

Instruction And Logic To Test Transactional Execution Status

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Concurrent Execution of Critical Sections by Eliding Ownership of L...

INSTRUCTION AND LOGIC TO TEST TRANSACTIONAL EXECUTION STATUS

Method, apparatus, and system for speculative abort control mechanisms

Method, apparatus, and system for speculative abort control mechanisms

Method, apparaturs, and system for speculative abort control mechan...

Method, apparatus, and system for speculative abort control mechanisms

Method, Apparatus, And System For Speculative Abort Control Mechanisms

Method, apparatus, and system for speculative abort control mechanisms