Ravindran Suresh

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Compiler architecture for programmable application specific integra...
- Patent number 10,466,976
- Issue date Nov 5, 2019
- Cavium, LLC
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithm to achieve optimal layout of instruction tables for progr...
- Patent number 9,870,204
- Issue date Jan 16, 2018
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Code generator for programmable network devices
- Patent number 9,864,584
- Issue date Jan 9, 2018
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithm to derive logic expression to select execution blocks for...
- Patent number 9,864,583
- Issue date Jan 9, 2018
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Code processor to build orthogonal execution blocks for programmabl...
- Patent number 9,864,582
- Issue date Jan 9, 2018
- Cavium, Inc.
- Kishore Badari Atreya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compiler architecture for programmable application specific integra...
- Patent number 9,836,283
- Issue date Dec 5, 2017
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parser engine programming tool for programmable network devices
- Patent number 9,606,781
- Issue date Mar 28, 2017
- Cavium, Inc.
- Kishore Badari Atreya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithm to achieve optimal layout of decision logic elements for...
- Patent number 9,582,251
- Issue date Feb 28, 2017
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
COMPILER ARCHITECTURE FOR PROGRAMMABLE APPLICATION SPECIFIC INTEGRA...
- Publication number 20180067728
- Publication date Mar 8, 2018
- Cavium, Inc.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALGORITHM TO ACHIEVE OPTIMAL LAYOUT OF DECISION LOGIC ELEMENTS FOR...
- Publication number 20160139900
- Publication date May 19, 2016
- XPLIANT, INC.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CODE GENERATOR FOR PROGRAMMABLE NETWORK DEVICES
- Publication number 20160139887
- Publication date May 19, 2016
- XPLIANT, INC.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALGORITHM TO DERIVE LOGIC EXPRESSION TO SELECT EXECUTION BLOCKS FOR...
- Publication number 20160139896
- Publication date May 19, 2016
- XPLIANT, INC.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALGORITHM TO ACHIEVE OPTIMAL LAYOUT OF INSTRUCTION TABLES FOR PROGR...
- Publication number 20160139898
- Publication date May 19, 2016
- XPLIANT, INC.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILER ARCHITECTURE FOR PROGRAMMABLE APPLICATION SPECIFIC INTEGRA...
- Publication number 20160139891
- Publication date May 19, 2016
- XPLIANT, INC.
- Ajeer Salil Pudiyapura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARSER ENGINE PROGRAMMING TOOL FOR PROGRAMMABLE NETWORK DEVICES
- Publication number 20160139892
- Publication date May 19, 2016
- XPLIANT, INC.
- Kishore Badari Atreya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CODE PROCESSOR TO BUILD ORTHOGONAL EXECUTION BLOCKS FOR PROGRAMMABL...
- Publication number 20160139893
- Publication date May 19, 2016
- XPLIANT, INC.
- Kishore Badari Atreya
- G06 - COMPUTING CALCULATING COUNTING

Ravindran Suresh

Person

Patents Grantslast 30 patents

Compiler architecture for programmable application specific integra...

Algorithm to achieve optimal layout of instruction tables for progr...

Code generator for programmable network devices

Algorithm to derive logic expression to select execution blocks for...

Code processor to build orthogonal execution blocks for programmabl...

Compiler architecture for programmable application specific integra...

Parser engine programming tool for programmable network devices

Algorithm to achieve optimal layout of decision logic elements for...

Patents Applicationslast 30 patents

COMPILER ARCHITECTURE FOR PROGRAMMABLE APPLICATION SPECIFIC INTEGRA...

ALGORITHM TO ACHIEVE OPTIMAL LAYOUT OF DECISION LOGIC ELEMENTS FOR...

CODE GENERATOR FOR PROGRAMMABLE NETWORK DEVICES

ALGORITHM TO DERIVE LOGIC EXPRESSION TO SELECT EXECUTION BLOCKS FOR...

ALGORITHM TO ACHIEVE OPTIMAL LAYOUT OF INSTRUCTION TABLES FOR PROGR...

COMPILER ARCHITECTURE FOR PROGRAMMABLE APPLICATION SPECIFIC INTEGRA...

PARSER ENGINE PROGRAMMING TOOL FOR PROGRAMMABLE NETWORK DEVICES

CODE PROCESSOR TO BUILD ORTHOGONAL EXECUTION BLOCKS FOR PROGRAMMABL...