Raymond Kong

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Time-multiplexed implementation of hardware accelerated functions i...
- Patent number 11,449,347
- Issue date Sep 20, 2022
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Per instance core control in accelerated computing environments
- Patent number 11,403,429
- Issue date Aug 2, 2022
- Xilinx, Inc.
- David Robinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial reconfiguration of integrated circuits using shell represen...
- Patent number 10,963,613
- Issue date Mar 30, 2021
- Xilinx, Inc.
- Meiwei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial reconfiguration for Network-on-Chip (NoC)
- Patent number 10,893,005
- Issue date Jan 12, 2021
- Xilinx, Inc.
- David P. Schultz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extend routing range for partial reconfiguration
- Patent number 10,824,786
- Issue date Nov 3, 2020
- Xilinx, Inc.
- Jun Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial reconfiguration of integrated circuits using shell represen...
- Patent number 10,796,058
- Issue date Oct 6, 2020
- Xilinx, Inc.
- Nicholas A. Mezei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing insulation circuitry for partial reconfiguration of programm...
- Patent number 10,651,853
- Issue date May 12, 2020
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic platform support in programmable integrated circuits
- Patent number 10,621,299
- Issue date Apr 14, 2020
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical partial reconfiguration for programmable integrated ci...
- Patent number 10,608,641
- Issue date Mar 31, 2020
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of enabling a partial reconfiguration in an integrated circu...
- Patent number 10,558,777
- Issue date Feb 11, 2020
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing circuit designs adapted for partial reconfiguration
- Patent number 10,296,699
- Issue date May 21, 2019
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boot and configuration management for accelerators
- Patent number 10,031,760
- Issue date Jul 24, 2018
- Xilinx, Inc.
- Sonal Santan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for automated configuration of design constraints
- Patent number 8,549,454
- Issue date Oct 1, 2013
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement providing for implementation granularity usi...
- Patent number 8,296,690
- Issue date Oct 23, 2012
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Incremental placement and routing
- Patent number 8,196,083
- Issue date Jun 5, 2012
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement providing for implementation granularity usi...
- Patent number 8,141,010
- Issue date Mar 20, 2012
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Run-time efficient methods for routing large multi-fanout nets
- Patent number 8,015,535
- Issue date Sep 6, 2011
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Run-time efficient methods for routing large multi-fanout nets
- Patent number 7,620,923
- Issue date Nov 17, 2009
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of placement for iterative implementation flows
- Patent number 7,614,025
- Issue date Nov 3, 2009
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Placing partitioned circuit designs within iterative implementation...
- Patent number 7,590,960
- Issue date Sep 15, 2009
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Run-time efficient methods for routing large multi-fanout nets
- Patent number 7,376,926
- Issue date May 20, 2008
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement providing for implementation granularity usi...
- Patent number 7,360,177
- Issue date Apr 15, 2008
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for managing behavior of algorithms
- Patent number 7,290,241
- Issue date Oct 30, 2007
- Xilinx, Inc.
- Daniel J. Downs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for designing integrated circuits using implement...
- Patent number 7,181,704
- Issue date Feb 20, 2007
- Xilinx, Inc.
- Daniel J. Downs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementation set-based guide engine and method of implementing a...
- Patent number 7,171,644
- Issue date Jan 30, 2007
- Xilinx, Inc.
- John J. Laurence
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing a circuit design in a tree repre...
- Patent number 7,146,583
- Issue date Dec 5, 2006
- Xilinx, Inc.
- Richard Yachyang Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit signal routing using resource cost assignment an...
- Patent number 7,107,563
- Issue date Sep 12, 2006
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for computing and using future costing data in signal routing
- Patent number 7,073,155
- Issue date Jul 4, 2006
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay optimization in signal routing
- Patent number 6,886,152
- Issue date Apr 26, 2005
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for computing and using future costing data in signal routing
- Patent number 6,851,101
- Issue date Feb 1, 2005
- Xilinx, Inc.
- Raymond Kong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BI-DIRECTIONAL DYNAMIC FUNCTION EXCHANGE
- Publication number 20240202421
- Publication date Jun 20, 2024
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL RECONFIGURATION FOR NETWORK-ON-CHIP (NOC)
- Publication number 20200092230
- Publication date Mar 19, 2020
- Xilinx, Inc.
- David P. Schultz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL PARTIAL RECONFIGURATION FOR PROGRAMMABLE INTEGRATED CI...
- Publication number 20200028511
- Publication date Jan 23, 2020
- Xilinx, Inc.
- Hao Yu
- G06 - COMPUTING CALCULATING COUNTING

Raymond Kong

Person

Patents Grantslast 30 patents

Time-multiplexed implementation of hardware accelerated functions i...

Per instance core control in accelerated computing environments

Partial reconfiguration of integrated circuits using shell represen...

Partial reconfiguration for Network-on-Chip (NoC)

Extend routing range for partial reconfiguration

Partial reconfiguration of integrated circuits using shell represen...

Timing insulation circuitry for partial reconfiguration of programm...

Dynamic platform support in programmable integrated circuits

Hierarchical partial reconfiguration for programmable integrated ci...

Method of enabling a partial reconfiguration in an integrated circu...

Implementing circuit designs adapted for partial reconfiguration

Boot and configuration management for accelerators

System and method for automated configuration of design constraints

Method and arrangement providing for implementation granularity usi...

Incremental placement and routing

Method and arrangement providing for implementation granularity usi...

Run-time efficient methods for routing large multi-fanout nets

Run-time efficient methods for routing large multi-fanout nets

Method of placement for iterative implementation flows

Placing partitioned circuit designs within iterative implementation...

Run-time efficient methods for routing large multi-fanout nets

Method and arrangement providing for implementation granularity usi...

Method and system for managing behavior of algorithms

Method and system for designing integrated circuits using implement...

Implementation set-based guide engine and method of implementing a...

Method and system for implementing a circuit design in a tree repre...

Integrated circuit signal routing using resource cost assignment an...

Method for computing and using future costing data in signal routing

Delay optimization in signal routing

Method for computing and using future costing data in signal routing

Patents Applicationslast 30 patents

BI-DIRECTIONAL DYNAMIC FUNCTION EXCHANGE

PARTIAL RECONFIGURATION FOR NETWORK-ON-CHIP (NOC)

HIERARCHICAL PARTIAL RECONFIGURATION FOR PROGRAMMABLE INTEGRATED CI...