Reading Maley

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Temperature and/or voltage independent voltage controlled oscillato...
- Patent number 8,598,958
- Issue date Dec 3, 2013
- Ambarella, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Temperature and/or voltage independent voltage controlled oscillato...
- Patent number 8,138,847
- Issue date Mar 20, 2012
- Ambarella, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Random number generation apparatus and method
- Patent number 7,613,756
- Issue date Nov 3, 2009
- Sun Microsystems, Inc.
- Xiaojun Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for tunneling leakage current compensation
- Patent number 6,744,303
- Issue date Jun 1, 2004
- Sun Microsystems, Inc.
- Reading Maley
- G05 - CONTROLLING REGULATING
Information Patent Grant
Stacked multi-chip modules using C4 interconnect technology having...
- Patent number 6,278,181
- Issue date Aug 21, 2001
- Advanced Micro Devices, Inc.
- Reading G. Maley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bottom side C4 bumps for integrated circuits
- Patent number 6,249,136
- Issue date Jun 19, 2001
- Advanced Micro Devices, Inc.
- Reading G. Maley
- G01 - MEASURING TESTING
Information Patent Grant
Using polysilicon fuse for IC programming
- Patent number 6,242,790
- Issue date Jun 5, 2001
- Advanced Micro Devices, Inc.
- Ting Y. Tsui
- G11 - INFORMATION STORAGE
Information Patent Grant
Output buffer with protective limit of voltage across terminals of...
- Patent number 6,081,152
- Issue date Jun 27, 2000
- Advanced Micro Devices, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level shifter with protective limit of voltage across terminals of...
- Patent number 6,054,888
- Issue date Apr 25, 2000
- Advanced Micro Devices, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processor with short set-up and hold times for bus signals
- Patent number 6,047,382
- Issue date Apr 4, 2000
- Advanced Micro Devices, Inc.
- Reading G. Maley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed gate oxide protected level shifter
- Patent number 5,969,542
- Issue date Oct 19, 1999
- Advanced Micro Devices, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference voltage generation scheme for gate oxide protected circuits
- Patent number 5,923,211
- Issue date Jul 13, 1999
- Advanced Micro Devices, Inc.
- Reading Maley
- G05 - CONTROLLING REGULATING
Information Patent Grant
Cross clock domain clocking for a system using two clock frequencie...
- Patent number 5,915,107
- Issue date Jun 22, 1999
- Advanced Micro Devices, Inc.
- Reading G. Maley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate oxide voltage limiting devices for digital circuits
- Patent number 5,892,371
- Issue date Apr 6, 1999
- Advanced Micro Devices, Inc.
- Reading Maley
- H03 - BASIC ELECTRONIC CIRCUITRY

Reading Maley

Person

Patents Grantslast 30 patents

Temperature and/or voltage independent voltage controlled oscillato...

Temperature and/or voltage independent voltage controlled oscillato...

Random number generation apparatus and method

Method and apparatus for tunneling leakage current compensation

Stacked multi-chip modules using C4 interconnect technology having...

Bottom side C4 bumps for integrated circuits

Using polysilicon fuse for IC programming

Output buffer with protective limit of voltage across terminals of...

Level shifter with protective limit of voltage across terminals of...

Processor with short set-up and hold times for bus signals

High speed gate oxide protected level shifter

Reference voltage generation scheme for gate oxide protected circuits

Cross clock domain clocking for a system using two clock frequencie...

Gate oxide voltage limiting devices for digital circuits