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Reecha Jajodia
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Noida, IN
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Patents Grants
last 30 patents
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Patent Grant
Scan flip-flop circuit with LOS scan enable signal
Patent number
9,188,640
Issue date
Nov 17, 2015
FREESCALE SEMICONDUCTOR, INC.
Reecha Jajodia
G01 - MEASURING TESTING
Information
Patent Grant
Spare gate cell for integrated circuit
Patent number
9,154,135
Issue date
Oct 6, 2015
FREESCALE SEMICONDUCTOR, INC.
Reecha Jajodia
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Scan flip-flop
Patent number
9,081,061
Issue date
Jul 14, 2015
FREESCALE SEMICONDUCTOR, INC.
Amol Agarwal
G01 - MEASURING TESTING
Patents Applications
last 30 patents
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Patent Application
SCAN FLIP-FLOP CIRCUIT WITH LOS SCAN ENABLE SIGNAL
Publication number
20150331044
Publication date
Nov 19, 2015
FREESCALE SEMICONDUCTOR, INC.
Reecha Jajodia
G01 - MEASURING TESTING
Information
Patent Application
SPARE GATE CELL FOR INTEGRATED CIRCUIT
Publication number
20150311898
Publication date
Oct 29, 2015
FREESCALE SEMICONDUCTOR, INC.
Reecha Jajodia
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
INTEGRATED CIRCUIT WITH LBIST SUB-PARTITIONS
Publication number
20150285859
Publication date
Oct 8, 2015
FREESCALE SEMICONDUCTOR, INC.
Reecha Jajodia
G01 - MEASURING TESTING