Reed Linde

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for binning at final test
- Patent number 11,919,046
- Issue date Mar 5, 2024
- Optimal Plus Ltd.
- Reed Linde
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Grant
System and method for binning at final test
- Patent number 11,235,355
- Issue date Feb 1, 2022
- Optimal Plus Ltd.
- Reed Linde
- G01 - MEASURING TESTING
Information Patent Grant
System and method for binning at final test
- Patent number 10,118,200
- Issue date Nov 6, 2018
- Optimal Plus Ltd.
- Reed Linde
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Grant
Systems and methods for test time outlier detection and correction...
- Patent number 9,529,036
- Issue date Dec 27, 2016
- Optimal Plus Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for test time outlier detection and correction...
- Patent number 8,872,538
- Issue date Oct 28, 2014
- Optimal Plus Ltd
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Grant
Misalignment indication decision system and method
- Patent number 8,838,408
- Issue date Sep 16, 2014
- Optimal Plus Ltd
- Reed Linde
- G01 - MEASURING TESTING
Information Patent Grant
System and methods for parametric testing
- Patent number 8,781,773
- Issue date Jul 15, 2014
- Optimal Plus Ltd
- Leonid Gurov
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for test time outlier detection and correction...
- Patent number 8,421,494
- Issue date Apr 16, 2013
- Optimaltest Ltd
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for test time outlier detection and correction...
- Patent number 7,969,174
- Issue date Jun 28, 2011
- OptimalTest Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Grant
Methods for slow test time detection of an integrated circuit durin...
- Patent number 7,528,622
- Issue date May 5, 2009
- Optimal Test Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Grant
Ultra low pin count interface for die testing
- Patent number 7,405,586
- Issue date Jul 29, 2008
- Intel Corporation
- Sunil Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory defect detection and self-repair technique
- Patent number 7,177,189
- Issue date Feb 13, 2007
- Intel Corporation
- Reed A. Linde
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR BINNING AT FINAL TEST
- Publication number 20220184665
- Publication date Jun 16, 2022
- Optimal Plus Ltd.
- Reed Linde
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR BINNING AT FINAL TEST
- Publication number 20190160494
- Publication date May 30, 2019
- Optimal Plus Ltd.
- Reed Linde
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Application
CORRELATION BETWEEN MANUFACTURING SEGMENT AND END- USER DEVICE PERF...
- Publication number 20160321594
- Publication date Nov 3, 2016
- Optimal Plus Ltd.
- Reed LINDE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...
- Publication number 20150012237
- Publication date Jan 8, 2015
- Optimal Plus Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...
- Publication number 20130193994
- Publication date Aug 1, 2013
- OptimalTest, Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Application
MISALIGNMENT INDICATION DECISION SYSTEM AND METHOD
- Publication number 20120123734
- Publication date May 17, 2012
- OptimalTest Ltd.
- Reed LINDE
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHODS FOR PARAMETRIC TESTING
- Publication number 20110251812
- Publication date Oct 13, 2011
- OptimalTest Ltd.
- Leonid GUROV
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...
- Publication number 20110224938
- Publication date Sep 15, 2011
- OptimalTest Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR BINNING AT FINAL TEST
- Publication number 20110000829
- Publication date Jan 6, 2011
- OptimalTest Ltd.
- Reed Linde
- B07 - SEPARATING SOLIDS FROM SOLIDS SORTING
Information Patent Application
SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...
- Publication number 20090192754
- Publication date Jul 30, 2009
- OptimalTest Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Application
DATALOG MANAGEMENT IN SEMICONDUCTOR TESTING
- Publication number 20090013218
- Publication date Jan 8, 2009
- Optimal Test Ltd.
- Eran ROUSSEAU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ultra low pin count interface for die testing
- Publication number 20070216438
- Publication date Sep 20, 2007
- Sunil Gupta
- G01 - MEASURING TESTING
Information Patent Application
System and methods for test time outlier detection and correction i...
- Publication number 20070132477
- Publication date Jun 14, 2007
- Optimal Test Ltd.
- Gil Balog
- G01 - MEASURING TESTING
Information Patent Application
Memory defect detection and self-repair technique
- Publication number 20050190615
- Publication date Sep 1, 2005
- Reed A. Linde
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

System and method for binning at final test

System and method for binning at final test

System and method for binning at final test

Systems and methods for test time outlier detection and correction...

Systems and methods for test time outlier detection and correction...

Misalignment indication decision system and method

System and methods for parametric testing

Systems and methods for test time outlier detection and correction...

Systems and methods for test time outlier detection and correction...

Methods for slow test time detection of an integrated circuit durin...

Ultra low pin count interface for die testing

Memory defect detection and self-repair technique

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR BINNING AT FINAL TEST

SYSTEM AND METHOD FOR BINNING AT FINAL TEST

CORRELATION BETWEEN MANUFACTURING SEGMENT AND END- USER DEVICE PERF...

SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...

SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...

MISALIGNMENT INDICATION DECISION SYSTEM AND METHOD

SYSTEM AND METHODS FOR PARAMETRIC TESTING

SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...

SYSTEM AND METHOD FOR BINNING AT FINAL TEST

SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION...

DATALOG MANAGEMENT IN SEMICONDUCTOR TESTING

Ultra low pin count interface for die testing

System and methods for test time outlier detection and correction i...

Memory defect detection and self-repair technique