Rey H. Bruce

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data storage system with configurable prefetch buffers
- Patent number 10,459,842
- Issue date Oct 29, 2019
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory transaction with reduced latency
- Patent number 10,120,586
- Issue date Nov 6, 2018
- BITMICRO, LLC
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage system with distributed ECC capability
- Patent number 9,996,419
- Issue date Jun 12, 2018
- BiTMICRO LLC
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed ECC engine for storage media
- Patent number 9,043,669
- Issue date May 26, 2015
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced latency memory read transactions in storage devices
- Patent number 8,959,307
- Issue date Feb 17, 2015
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input-output device and storage controller handshake protocol using...
- Patent number 8,165,301
- Issue date Apr 24, 2012
- BiTMICRO NETWORKS, Inc.
- Rey Bruce
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple chip module and package stacking method for storage devices
- Patent number 8,093,103
- Issue date Jan 10, 2012
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid multi-tiered caching storage system
- Patent number 8,032,700
- Issue date Oct 4, 2011
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple chip module and package stacking for storage devices
- Patent number 7,826,243
- Issue date Nov 2, 2010
- BiTMICRO NETWORKS, Inc.
- Rey Bruce
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Direct memory access controller with encryption and decryption for...
- Patent number 7,716,389
- Issue date May 11, 2010
- BiTMICRO NETWORKS, Inc.
- Rey Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware assisted non-volatile memory-to-input/output direct memory...
- Patent number 7,620,748
- Issue date Nov 17, 2009
- BiTMICRO NETWORKS, Inc.
- Ricardo Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid multi-tiered caching storage system
- Patent number 7,613,876
- Issue date Nov 3, 2009
- BiTMICRO NETWORKS, Inc.
- Rey H. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network storage device having solid-state non-volatile memory
- Patent number 6,981,070
- Issue date Dec 27, 2005
- Shun Hang Luk
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE CHIP MODULE AND PACKAGE STACKING METHOD FOR STORAGE DEVICES
- Publication number 20110038127
- Publication date Feb 17, 2011
- BiTMICRO Networks, Inc.
- Rey BRUCE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID MULTI-TIERED CACHING STORAGE SYSTEM
- Publication number 20100095053
- Publication date Apr 15, 2010
- BiTMICRO Networks, Inc.
- Rey H. BRUCE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid Multi-Tiered Caching Storage System
- Publication number 20070288692
- Publication date Dec 13, 2007
- BiTMICRO Networks, Inc.
- Rey Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple chip module and package stacking method for storage devices
- Publication number 20070158808
- Publication date Jul 12, 2007
- Rey Bruce
- H01 - BASIC ELECTRIC ELEMENTS

Rey H. Bruce

Person

Patents Grantslast 30 patents

Data storage system with configurable prefetch buffers

Memory transaction with reduced latency

Storage system with distributed ECC capability

Distributed ECC engine for storage media

Reduced latency memory read transactions in storage devices

Input-output device and storage controller handshake protocol using...

Multiple chip module and package stacking method for storage devices

Hybrid multi-tiered caching storage system

Multiple chip module and package stacking for storage devices

Direct memory access controller with encryption and decryption for...

Hardware assisted non-volatile memory-to-input/output direct memory...

Hybrid multi-tiered caching storage system

Network storage device having solid-state non-volatile memory

Patents Applicationslast 30 patents

MULTIPLE CHIP MODULE AND PACKAGE STACKING METHOD FOR STORAGE DEVICES

HYBRID MULTI-TIERED CACHING STORAGE SYSTEM

Hybrid Multi-Tiered Caching Storage System

Multiple chip module and package stacking method for storage devices