Richard B. Foehringer

Person

El Dorado Hills, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Packaging method for circuit board
- Patent number 7,533,457
- Issue date May 19, 2009
- Intel Corporation
- Richard B Foehringer
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Lower profile package with power supply in package
- Patent number 6,812,566
- Issue date Nov 2, 2004
- Intel Corporation
- Eleanor P. Rabadam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementing micro BGA assembly techniques for small die
- Patent number 6,655,022
- Issue date Dec 2, 2003
- Intel Corporation
- Steven R. Eskildsen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementing micro BGA™ assembly techniques for small die
- Patent number 6,489,557
- Issue date Dec 3, 2002
- Intel Corporation
- Steven R. Eskildsen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual sided integrated circuit chip package with offset wire bonds a...
- Patent number 5,545,922
- Issue date Aug 13, 1996
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing dual sided wire bonded integrated circuit chip packag...
- Patent number 5,527,740
- Issue date Jun 18, 1996
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for constructing a dual sided, wire bonded integrated circui...
- Patent number 5,366,933
- Issue date Nov 22, 1994
- Intel Corporation
- Suresh V. Golwalkar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Packaging method and apparatus
- Publication number 20070004095
- Publication date Jan 4, 2007
- Richard B. Foehringer
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Pre-applied underfill
- Publication number 20040119151
- Publication date Jun 24, 2004
- Intel Corporation
- Richard Bernard Foehringer
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Memory device packaging including stacked passive devices and metho...
- Publication number 20030122216
- Publication date Jul 3, 2003
- Eleanor P. Rabadam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Lower profile package with power supply in package
- Publication number 20030123239
- Publication date Jul 3, 2003
- Eleanor P. Rabadam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPLEMENTING MICRO BGATM ASSEMBLY TECHNIQUES FOR SMALL DIE
- Publication number 20020079120
- Publication date Jun 27, 2002
- STEVEN R. ESKILDSEN
- H01 - BASIC ELECTRIC ELEMENTS

Richard B. Foehringer

Person

Patents Grantslast 30 patents

Packaging method for circuit board

Lower profile package with power supply in package

Implementing micro BGA assembly techniques for small die

Implementing micro BGA&#x02122; assembly techniques for small die

Dual sided integrated circuit chip package with offset wire bonds a...

Manufacturing dual sided wire bonded integrated circuit chip packag...

Method for constructing a dual sided, wire bonded integrated circui...

Patents Applicationslast 30 patents

Packaging method and apparatus

Pre-applied underfill

Memory device packaging including stacked passive devices and metho...

Lower profile package with power supply in package

IMPLEMENTING MICRO BGATM ASSEMBLY TECHNIQUES FOR SMALL DIE

Implementing micro BGA™ assembly techniques for small die