Richard Carlson

Person

Ft Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,725,920
- Issue date Jul 28, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,725,919
- Issue date Jul 28, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,705,960
- Issue date Jul 7, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,073,779
- Issue date Sep 11, 2018
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read control systems and methods
- Patent number 7,434,151
- Issue date Oct 7, 2008
- Hewlett-Packard Development Company, L.P.
- Richard Lawrence Carlson
- G11 - INFORMATION STORAGE
Information Patent Grant
Instruction cache using single-ported memories
- Patent number 7,181,575
- Issue date Feb 20, 2007
- Hewlett-Packard Development Company, L.P.
- Richard L. Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified buffer for tracking disparate long-latency operations in a...
- Patent number 6,804,769
- Issue date Oct 12, 2004
- Hewlett-Packard Development Company, L.P.
- Richard Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for translation lookaside buffers to access a...
- Patent number 6,560,664
- Issue date May 6, 2003
- Hewlett-Packard Development Company, L.P.
- Richard Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retaining state information of an array of elements by subdividing...
- Patent number 6,490,656
- Issue date Dec 3, 2002
- Hewlett-Packard Company
- Richard Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for enhanced peripheral component interconnect bus split dat...
- Patent number 5,928,346
- Issue date Jul 27, 1999
- Hewlett-Packard Company
- Leith L. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced peripheral component interconnect bus protocol
- Patent number 5,689,660
- Issue date Nov 18, 1997
- Hewlett-Packard Co.
- Leith L. Johnson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225212
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225213
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225211
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20140189239
- Publication date Jul 3, 2014
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Read control systems and methods
- Publication number 20060075313
- Publication date Apr 6, 2006
- Richard Lawrence Carlson
- G11 - INFORMATION STORAGE
Information Patent Application
Instruction cache using single-ported memories
- Publication number 20060069873
- Publication date Mar 30, 2006
- Richard L. Carlson
- G06 - COMPUTING CALCULATING COUNTING

Richard Carlson

Person

Patents Grantslast 30 patents

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Read control systems and methods

Instruction cache using single-ported memories

Unified buffer for tracking disparate long-latency operations in a...

Method and apparatus for translation lookaside buffers to access a...

Retaining state information of an array of elements by subdividing...

Method for enhanced peripheral component interconnect bus split dat...

Enhanced peripheral component interconnect bus protocol

Patents Applicationslast 30 patents

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

Read control systems and methods

Instruction cache using single-ported memories