Richard D. Pashley

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for accessing and downloading information from...
- Patent number RE44877
- Issue date Apr 29, 2014
- Intel Corporation
- Richard D. Pashley
- 709 - Electrical computers and digital processing systems: multicomputer data...
Information Patent Grant
Synchronous interface for a nonvolatile memory
- Patent number 6,564,285
- Issue date May 13, 2003
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit memory and method for transferring data using a...
- Patent number 6,418,506
- Issue date Jul 9, 2002
- Intel Corporation
- Richard D. Pashley
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronous interface for a nonvolatile memory
- Patent number 6,385,688
- Issue date May 7, 2002
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory including a mode register for indicating synchronous o...
- Patent number 6,026,465
- Issue date Feb 15, 2000
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for accessing and downloading information from...
- Patent number 5,978,833
- Issue date Nov 2, 1999
- Intel Corporation
- Richard D. Pashley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor having single poly-silicon EPROM memory for programm...
- Patent number 5,852,712
- Issue date Dec 22, 1998
- Intel Corporation
- Michael J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuitry for usage of partially functional nonvolatile...
- Patent number 5,822,256
- Issue date Oct 13, 1998
- Intel Corporation
- Mark E. Bauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Microprocessor having single poly-silicon EPROM memory for programm...
- Patent number 5,732,207
- Issue date Mar 24, 1998
- Intel Corporation
- Michael J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing burst read operations in an asy...
- Patent number 5,696,917
- Issue date Dec 9, 1997
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MOS/SOS Process
- Patent number 4,272,880
- Issue date Jun 16, 1981
- Intel Corporation
- Richard D. Pashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming a contact region between layers of polysilicon...
- Patent number 4,178,674
- Issue date Dec 18, 1979
- Intel Corporation
- Sheau-Ming S. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low power/high speed static ram
- Patent number 4,096,584
- Issue date Jun 20, 1978
- Intel Corporation
- William H. Owen
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for preparing a substrate for MOS devices of different thre...
- Patent number 4,052,229
- Issue date Oct 4, 1977
- Intel Corporation
- Richard D. Pashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density/high speed MOS process and device
- Patent number 4,033,026
- Issue date Jul 5, 1977
- Intel Corporation
- Richard D. Pashley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for defining polycrystalline silicon patterns
- Patent number 4,026,733
- Issue date May 31, 1977
- Intel Corporation
- William H. Owen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed MOS RAM employing depletion loads
- Patent number 3,946,369
- Issue date Mar 23, 1976
- Intel Corporation
- Richard D. Pashley
- G11 - INFORMATION STORAGE

Richard D. Pashley

Person

Patents Grantslast 30 patents

Method and apparatus for accessing and downloading information from...

Synchronous interface for a nonvolatile memory

Integrated circuit memory and method for transferring data using a...

Asynchronous interface for a nonvolatile memory

Flash memory including a mode register for indicating synchronous o...

Method and apparatus for accessing and downloading information from...

Microprocessor having single poly-silicon EPROM memory for programm...

Method and circuitry for usage of partially functional nonvolatile...

Microprocessor having single poly-silicon EPROM memory for programm...

Method and apparatus for performing burst read operations in an asy...

MOS/SOS Process

Process for forming a contact region between layers of polysilicon...

Low power/high speed static ram

Process for preparing a substrate for MOS devices of different thre...

High density/high speed MOS process and device

Process for defining polycrystalline silicon patterns

High speed MOS RAM employing depletion loads