Richard K. Eguchi

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Resistive memory with adjustable write parameter
- Patent number 11,581,030
- Issue date Feb 14, 2023
- NXP USA, INC.
- Richard Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with selectable hard write
- Patent number 11,056,160
- Issue date Jul 6, 2021
- NXP USA, INC.
- Richard Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Magnetic disturb diagnostic system for MRAM
- Patent number 10,573,364
- Issue date Feb 25, 2020
- NXP USA, INC.
- Padmaraj Sanjeevarao
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for stressing a non-volatile memory
- Patent number 10,109,356
- Issue date Oct 23, 2018
- NXP USA, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) with endurance control
- Patent number 9,508,397
- Issue date Nov 29, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Imminent read failure detection using high/low read voltage levels
- Patent number 9,329,921
- Issue date May 3, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Jon W. Weilemann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Imminent read failure detection based upon unacceptable wear for NV...
- Patent number 9,329,932
- Issue date May 3, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Jon W. Weilemann
- G11 - INFORMATION STORAGE
Information Patent Grant
Imminent read failure detection based upon changes in error voltage...
- Patent number 9,329,933
- Issue date May 3, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Jon W. Weilemann
- G11 - INFORMATION STORAGE
Information Patent Grant
Robust memory start-up using clock counter
- Patent number 9,318,163
- Issue date Apr 19, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory robust start-up using analog-to-digital converter
- Patent number 9,318,161
- Issue date Apr 19, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature-based adaptive erase or program parallelism
- Patent number 9,224,478
- Issue date Dec 29, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) with adaptive write operations
- Patent number 9,082,510
- Issue date Jul 14, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self trim for non-volatile memory reference current
- Patent number 9,076,508
- Issue date Jul 7, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Stress-based techniques for detecting an imminent read failure in a...
- Patent number 8,977,914
- Issue date Mar 10, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for adjusting NVM cell bias conditions for prog...
- Patent number 8,902,667
- Issue date Dec 2, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Fuchen Mu
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) with imminent error prediction
- Patent number 8,782,478
- Issue date Jul 15, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self trim for non-volatile memory reference current
- Patent number 8,687,428
- Issue date Apr 1, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) with imminent error prediction
- Patent number 8,572,445
- Issue date Oct 29, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for EEPROM emulation for preventing data loss...
- Patent number 8,516,213
- Issue date Aug 20, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive write procedures for non-volatile memory
- Patent number 8,509,001
- Issue date Aug 13, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold voltage techniques for detecting an imminent read failure...
- Patent number 8,504,884
- Issue date Aug 6, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write procedures for non-volatile memory using verify read
- Patent number 8,432,752
- Issue date Apr 30, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital method to obtain the I-V curves of NVM bitcells
- Patent number 8,427,877
- Issue date Apr 23, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory (NVM) erase operation with brownout recovery te...
- Patent number 8,289,773
- Issue date Oct 16, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
Information Patent Grant
Time-based techniques for detecting an imminent read failure in a m...
- Patent number 8,095,836
- Issue date Jan 10, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with adjustable read reference based on ECC and metho...
- Patent number 7,865,797
- Issue date Jan 4, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for electrically trimming an NVM reference cell
- Patent number 7,782,664
- Issue date Aug 24, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Horacio P. Gasquet
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory having a dynamically adjustable soft program ve...
- Patent number 7,649,782
- Issue date Jan 19, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory having a multiple block erase mode and method t...
- Patent number 7,640,389
- Issue date Dec 29, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-circuit Vt distribution bit counter for non-volatile memory devices
- Patent number 7,599,236
- Issue date Oct 6, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
RESISTIVE MEMORY WITH ADJUSTABLE WRITE PARAMETER
- Publication number 20220020411
- Publication date Jan 20, 2022
- NXP USA, Inc.
- Richard Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH SELECTABLE HARD WRITE
- Publication number 20210118475
- Publication date Apr 22, 2021
- NXP USA, Inc.
- Richard Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR STRESSING A NON-VOLATILE MEMORY
- Publication number 20160247574
- Publication date Aug 25, 2016
- FREESCALE SEMICONDUCTOR, INC.
- CHEN HE
- G11 - INFORMATION STORAGE
Information Patent Application
Imminent Read Failure Detection Based Upon Unacceptable Wear For NV...
- Publication number 20150309857
- Publication date Oct 29, 2015
- Jon W. Weilemann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Imminent Read Failure Detection Based Upon Changes In Error Voltage...
- Publication number 20150309858
- Publication date Oct 29, 2015
- Jon W. Weilemann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Imminent Read Failure Detection Using High/Low Read Voltage Levels
- Publication number 20150309856
- Publication date Oct 29, 2015
- Jon W. Weilemann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROBUST MEMORY START-UP USING CLOCK COUNTER
- Publication number 20140254299
- Publication date Sep 11, 2014
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Temperature-Based Adaptive Erase or Program Parallelism
- Publication number 20140254285
- Publication date Sep 11, 2014
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF TRIM FOR NON-VOLATILE MEMORY REFERENCE CURRENT
- Publication number 20140160869
- Publication date Jun 12, 2014
- FREESCALE SEMICONDUCTOR, INC.
- CHEN HE
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY ROBUST START-UP USING ANALOG-TO-DIGITAL CONVERTER
- Publication number 20140140161
- Publication date May 22, 2014
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY (NVM) WITH ADAPTIVE WRITE OPERATIONS
- Publication number 20140078829
- Publication date Mar 20, 2014
- CHEN HE
- G11 - INFORMATION STORAGE
Information Patent Application
Non-Volatile Memory (NVM) with Imminent Error Prediction
- Publication number 20140040687
- Publication date Feb 6, 2014
- Richard K. Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR ADJUSTING NVM CELL BIAS CONDITIONS FOR PROG...
- Publication number 20140029351
- Publication date Jan 30, 2014
- Fuchen Mu
- G11 - INFORMATION STORAGE
Information Patent Application
STRESS-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A...
- Publication number 20130326285
- Publication date Dec 5, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN SELF TRIM FOR NON-VOLATILE MEMORY REFERENCE CURRENT
- Publication number 20130107621
- Publication date May 2, 2013
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WRITE PROCEDURES FOR NON-VOLATILE MEMORY USING VERIFY READ
- Publication number 20120327720
- Publication date Dec 27, 2012
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WRITE PROCEDURES FOR NON-VOLATILE MEMORY
- Publication number 20120327710
- Publication date Dec 27, 2012
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Application
Digital Method to Obtain the I-V Curves of NVM Bitcells
- Publication number 20120206973
- Publication date Aug 16, 2012
- Chen He
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for EEPROM Emulation for Preventing Data Loss...
- Publication number 20120131262
- Publication date May 24, 2012
- CHEN HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY (NVM) ERASE OPERATION WITH BROWNOUT RECOVERY TE...
- Publication number 20120117307
- Publication date May 10, 2012
- RICHARD K. EGUCHI
Information Patent Application
NON-VOLATILE MEMORY (NVM) WITH IMMINENT ERROR PREDICTION
- Publication number 20120072794
- Publication date Mar 22, 2012
- RICHARD K. EGUCHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE...
- Publication number 20110107161
- Publication date May 5, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Richard Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
TIME-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A M...
- Publication number 20110107160
- Publication date May 5, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Richard Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ELECTRICALLY TRIMMING AN NVM REFERENCE CELL
- Publication number 20090296464
- Publication date Dec 3, 2009
- Horacio P. Gasquet
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRICAL ERASABLE PROGRAMMABLE MEMORY TRANSCONDUCTANCE TESTING
- Publication number 20090168541
- Publication date Jul 2, 2009
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY HAVING A DYNAMICALLY ADJUSTABLE SOFT PROGRAM VE...
- Publication number 20090034339
- Publication date Feb 5, 2009
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH ADJUSTABLE READ REFERENCE BASED ON ECC AND METHO...
- Publication number 20080120526
- Publication date May 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Richard K. Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
In-circuit Vt distribution bit counter for non-volatile memory devices
- Publication number 20070285986
- Publication date Dec 13, 2007
- Richard K. Eguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory having a multiple block erase mode and method t...
- Publication number 20070204098
- Publication date Aug 30, 2007
- Richard K. Eguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit with test pad structure and method of testing
- Publication number 20050030055
- Publication date Feb 10, 2005
- Tu-Anh Tran
- G01 - MEASURING TESTING

Richard K. Eguchi

Person

Patents Grantslast 30 patents

Resistive memory with adjustable write parameter

Non-volatile memory with selectable hard write

Magnetic disturb diagnostic system for MRAM

Method and apparatus for stressing a non-volatile memory

Non-volatile memory (NVM) with endurance control

Imminent read failure detection using high/low read voltage levels

Imminent read failure detection based upon unacceptable wear for NV...

Imminent read failure detection based upon changes in error voltage...

Robust memory start-up using clock counter

Non-volatile memory robust start-up using analog-to-digital converter

Temperature-based adaptive erase or program parallelism

Non-volatile memory (NVM) with adaptive write operations

Built-in self trim for non-volatile memory reference current

Stress-based techniques for detecting an imminent read failure in a...

Methods and systems for adjusting NVM cell bias conditions for prog...

Non-volatile memory (NVM) with imminent error prediction

Built-in self trim for non-volatile memory reference current

Non-volatile memory (NVM) with imminent error prediction

Method and apparatus for EEPROM emulation for preventing data loss...

Adaptive write procedures for non-volatile memory

Threshold voltage techniques for detecting an imminent read failure...

Adaptive write procedures for non-volatile memory using verify read

Digital method to obtain the I-V curves of NVM bitcells

Non-volatile memory (NVM) erase operation with brownout recovery te...

Time-based techniques for detecting an imminent read failure in a m...

Memory device with adjustable read reference based on ECC and metho...

Method for electrically trimming an NVM reference cell

Non-volatile memory having a dynamically adjustable soft program ve...

Non-volatile memory having a multiple block erase mode and method t...

In-circuit Vt distribution bit counter for non-volatile memory devices

Patents Applicationslast 30 patents

RESISTIVE MEMORY WITH ADJUSTABLE WRITE PARAMETER

NON-VOLATILE MEMORY WITH SELECTABLE HARD WRITE

METHOD AND APPARATUS FOR STRESSING A NON-VOLATILE MEMORY

Imminent Read Failure Detection Based Upon Unacceptable Wear For NV...

Imminent Read Failure Detection Based Upon Changes In Error Voltage...

Imminent Read Failure Detection Using High/Low Read Voltage Levels

ROBUST MEMORY START-UP USING CLOCK COUNTER

Temperature-Based Adaptive Erase or Program Parallelism

BUILT-IN SELF TRIM FOR NON-VOLATILE MEMORY REFERENCE CURRENT

NON-VOLATILE MEMORY ROBUST START-UP USING ANALOG-TO-DIGITAL CONVERTER

NON-VOLATILE MEMORY (NVM) WITH ADAPTIVE WRITE OPERATIONS

Non-Volatile Memory (NVM) with Imminent Error Prediction

METHODS AND SYSTEMS FOR ADJUSTING NVM CELL BIAS CONDITIONS FOR PROG...

STRESS-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A...

BUILT-IN SELF TRIM FOR NON-VOLATILE MEMORY REFERENCE CURRENT

ADAPTIVE WRITE PROCEDURES FOR NON-VOLATILE MEMORY USING VERIFY READ

ADAPTIVE WRITE PROCEDURES FOR NON-VOLATILE MEMORY

Digital Method to Obtain the I-V Curves of NVM Bitcells

Method and Apparatus for EEPROM Emulation for Preventing Data Loss...

NON-VOLATILE MEMORY (NVM) ERASE OPERATION WITH BROWNOUT RECOVERY TE...

NON-VOLATILE MEMORY (NVM) WITH IMMINENT ERROR PREDICTION

THRESHOLD VOLTAGE TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE...

TIME-BASED TECHNIQUES FOR DETECTING AN IMMINENT READ FAILURE IN A M...

METHOD FOR ELECTRICALLY TRIMMING AN NVM REFERENCE CELL

ELECTRICAL ERASABLE PROGRAMMABLE MEMORY TRANSCONDUCTANCE TESTING

NON-VOLATILE MEMORY HAVING A DYNAMICALLY ADJUSTABLE SOFT PROGRAM VE...

MEMORY DEVICE WITH ADJUSTABLE READ REFERENCE BASED ON ECC AND METHO...

In-circuit Vt distribution bit counter for non-volatile memory devices

Non-volatile memory having a multiple block erase mode and method t...

Integrated circuit with test pad structure and method of testing