Richard Slobodnik

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Latch circuitry for memory applications
- Patent number 11,568,926
- Issue date Jan 31, 2023
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch circuitry for memory applications
- Patent number 10,847,211
- Issue date Nov 24, 2020
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scan cell for dual port memory applications
- Patent number 10,222,418
- Issue date Mar 5, 2019
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory self testing
- Patent number 7,434,119
- Issue date Oct 7, 2008
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit and method for testing memory on the integrated...
- Patent number 7,308,623
- Issue date Dec 11, 2007
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory self-test via a ring bus in a data processing apparatus
- Patent number 7,293,212
- Issue date Nov 6, 2007
- ARM Limted
- Conrado Blasco Allue
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory self testing
- Patent number 7,269,766
- Issue date Sep 11, 2007
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory self testing
- Patent number 7,062,689
- Issue date Jun 13, 2006
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Grant
Switching between clocks in data processing
- Patent number 7,053,675
- Issue date May 30, 2006
- ARM Limited
- Richard Slobodnik
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY EMBEDDED FULL SCAN FOR LATENT DEFECTS
- Publication number 20220074988
- Publication date Mar 10, 2022
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Latch Circuitry for Memory Applications
- Publication number 20210074353
- Publication date Mar 11, 2021
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Latch Circuitry for Memory Applications
- Publication number 20190325947
- Publication date Oct 24, 2019
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Scan Cell for Dual Port Memory Applications
- Publication number 20180156866
- Publication date Jun 7, 2018
- ARM Limited
- Yew Keong Chong
- G01 - MEASURING TESTING
Information Patent Application
Memory self-test via a ring bus in a data processing apparatus
- Publication number 20060218449
- Publication date Sep 28, 2006
- ARM Limited
- Conrado Blasco Allue
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit and method for testing memory on the integrated...
- Publication number 20060212764
- Publication date Sep 21, 2006
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for memory self testing
- Publication number 20060200713
- Publication date Sep 7, 2006
- ARM Limited
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Application
Switching between clocks in data processing
- Publication number 20050017763
- Publication date Jan 27, 2005
- ARM Limited
- Richard Slobodnik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for memory self testing
- Publication number 20030167426
- Publication date Sep 4, 2003
- Richard Slobodnik
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for memory self testing
- Publication number 20030120985
- Publication date Jun 26, 2003
- Richard Slobodnik
- G11 - INFORMATION STORAGE

Richard Slobodnik

Person

Patents Grantslast 30 patents

Latch circuitry for memory applications

Latch circuitry for memory applications

Scan cell for dual port memory applications

Method and apparatus for memory self testing

Integrated circuit and method for testing memory on the integrated...

Memory self-test via a ring bus in a data processing apparatus

Method and apparatus for memory self testing

Method and apparatus for memory self testing

Switching between clocks in data processing

Patents Applicationslast 30 patents

MEMORY EMBEDDED FULL SCAN FOR LATENT DEFECTS

Latch Circuitry for Memory Applications

Latch Circuitry for Memory Applications

Scan Cell for Dual Port Memory Applications

Memory self-test via a ring bus in a data processing apparatus

Integrated circuit and method for testing memory on the integrated...

Method and apparatus for memory self testing

Switching between clocks in data processing

Method and apparatus for memory self testing

Method and apparatus for memory self testing