Richard W. Mauntel

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of manufacturing a heterojunction BiCMOS integrated circuit
- Patent number 6,461,925
- Issue date Oct 8, 2002
- Motorola, Inc.
- Jay P. John
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resistless methods of gate formation in MOS devices
- Patent number 5,830,801
- Issue date Nov 3, 1998
- Motorola, Inc.
- Kumar Shiralagi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having punch-through protected buried contacts...
- Patent number 5,208,168
- Issue date May 4, 1993
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact SRAM cell with polycrystalline silicon diode load
- Patent number 5,021,849
- Issue date Jun 4, 1991
- Motorola, Inc.
- John R. Pfiester
- G11 - INFORMATION STORAGE
Information Patent Grant
Well Extensions for trench devices
- Patent number 4,808,543
- Issue date Feb 28, 1989
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple step formation of conductive material layers
- Patent number 4,808,555
- Issue date Feb 28, 1989
- Motorola, Inc.
- Richard W. Mauntel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable sidewall spacer for lightly doped drain formation using o...
- Patent number 4,745,086
- Issue date May 17, 1988
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable sidewall spacer for lightly doped drain formation using t...
- Patent number 4,722,909
- Issue date Feb 2, 1988
- Motorola, Inc.
- Louis C. Parrillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried n.sup.- channel implant for NMOS transistors
- Patent number 4,701,775
- Issue date Oct 20, 1987
- Motorola, Inc.
- Stephen J. Cosentino
- H01 - BASIC ELECTRIC ELEMENTS

Richard W. Mauntel

Person

Patents Grantslast 30 patents

Method of manufacturing a heterojunction BiCMOS integrated circuit

Resistless methods of gate formation in MOS devices

Semiconductor device having punch-through protected buried contacts...

Compact SRAM cell with polycrystalline silicon diode load

Well Extensions for trench devices

Multiple step formation of conductive material layers

Removable sidewall spacer for lightly doped drain formation using o...

Removable sidewall spacer for lightly doped drain formation using t...

Buried n.sup.- channel implant for NMOS transistors