Robert A. May

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
First layer interconnect first on carrier approach for EMIB patch
- Patent number 12,354,992
- Issue date Jul 8, 2025
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 12,354,963
- Issue date Jul 8, 2025
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 12,334,443
- Issue date Jun 17, 2025
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrate, an electrical device and a method for f...
- Patent number 12,300,613
- Issue date May 13, 2025
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magneto-optical Kerr effect interconnects for photonic packaging
- Patent number 12,253,722
- Issue date Mar 18, 2025
- Intel Corporation
- Hiroki Tanaka
- G02 - OPTICS
Information Patent Grant
Multi-chip package with high density interconnects
- Patent number 12,218,069
- Issue date Feb 4, 2025
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level packaging for multi-die products interconnected with ve...
- Patent number 12,218,071
- Issue date Feb 4, 2025
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 12,176,223
- Issue date Dec 24, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic component having molded regions with through-mold vias
- Patent number 12,176,292
- Issue date Dec 24, 2024
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EMIB patch on glass laminate substrate
- Patent number 12,148,703
- Issue date Nov 19, 2024
- Intel Corporation
- Robert Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device with embedded die substrate on interposer
- Patent number 12,046,560
- Issue date Jul 23, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method of very high density routing used with embedded m...
- Patent number 12,040,276
- Issue date Jul 16, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method of very high density routing used with embedded m...
- Patent number 12,014,989
- Issue date Jun 18, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Subtractive etch resolution implementing a functional thin metal re...
- Patent number 11,948,848
- Issue date Apr 2, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface finishes with low RBTV for fine and mixed bump pitch archit...
- Patent number 11,935,857
- Issue date Mar 19, 2024
- Intel Corporation
- Kristof Darmawaikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic cavity formation to enable EMIB bump pitch scaling
- Patent number 11,929,330
- Issue date Mar 12, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic structures including bridges
- Patent number 11,923,307
- Issue date Mar 5, 2024
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip package with high density interconnects
- Patent number 11,908,802
- Issue date Feb 20, 2024
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial dielectric for lithographic via formation to enable via...
- Patent number 11,908,821
- Issue date Feb 20, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrate, an electrical device and a method for f...
- Patent number 11,901,296
- Issue date Feb 13, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die architecture and method of making
- Patent number 11,901,248
- Issue date Feb 13, 2024
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device with embedded die substrate on interposer
- Patent number 11,894,311
- Issue date Feb 6, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of embedding magnetic structures in substrates
- Patent number 11,862,552
- Issue date Jan 2, 2024
- Intel Corporation
- Sai Vadlamani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patch accommodating embedded dies having different thicknesses
- Patent number 11,862,619
- Issue date Jan 2, 2024
- Intel Corporation
- Srinivas Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package supports
- Patent number 11,854,834
- Issue date Dec 26, 2023
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic component having molded regions with through-mold vias
- Patent number 11,817,390
- Issue date Nov 14, 2023
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrate, an electrical device and a method for f...
- Patent number 11,784,128
- Issue date Oct 10, 2023
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded multi-die interconnect bridge packages with lithographical...
- Patent number 11,764,158
- Issue date Sep 19, 2023
- Intel Corporation
- Amruthavalli Pallavi Alur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level packaging for multi-die products interconnected with ve...
- Patent number 11,735,531
- Issue date Aug 22, 2023
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,721,631
- Issue date Aug 8, 2023
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS
- Publication number 20250226323
- Publication date Jul 10, 2025
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO EMBED SEMICONDUCTOR DEVICES IN CORES OF PA...
- Publication number 20250218960
- Publication date Jul 3, 2025
- Intel Corporation
- Clay Bradley Arrington
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE AND CONDUCTIVE VIAS EMBEDDED IN A SUBSTRATE
- Publication number 20250218963
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PEDESTAL STRUCTURE FOR PASSIVE CIRCUIT COMPONENT STRUCTURE
- Publication number 20250218915
- Publication date Jul 3, 2025
- Intel Corporation
- Tolga Acikalin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE WITHIN A HOLE IN A SUBSTRATE CORE ATTACHED TO METAL FEATURES OV...
- Publication number 20250218678
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESIST TENTING AND PLATING IN CORE CAVITY FOR COMPONENT ATTACHMENT
- Publication number 20250218879
- Publication date Jul 3, 2025
- Intel Corporation
- Hiroki TANAKA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH STRENGTHENED GLASS CORES
- Publication number 20250210426
- Publication date Jun 26, 2025
- Intel Corporation
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY EMBEDDED PRE-FORMED DEEP TRENCH CAPACITOR MODULES
- Publication number 20250201485
- Publication date Jun 19, 2025
- Intel Corporation
- Hiroki Tanaka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIRECT BONDING FOR EMBEDDED BRIDGES WITH VIAS
- Publication number 20250183180
- Publication date Jun 5, 2025
- Intel Corporation
- Brandon C. MARIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS
- Publication number 20250125275
- Publication date Apr 17, 2025
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...
- Publication number 20250125277
- Publication date Apr 17, 2025
- Intel Corporation
- Srinivas V. PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY
- Publication number 20250112100
- Publication date Apr 3, 2025
- Intel Corporation
- Robert May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...
- Publication number 20250112165
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SUPPORTS
- Publication number 20250069902
- Publication date Feb 27, 2025
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS
- Publication number 20250070030
- Publication date Feb 27, 2025
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR EDGE PROTECTED GLASS CORES
- Publication number 20250022786
- Publication date Jan 16, 2025
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES INCLUDING A PHOTOIMAGEABLE DIELECTRIC FO...
- Publication number 20250006645
- Publication date Jan 2, 2025
- Intel Corporation
- Xiao Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CO-PACKAGING OF PHOTONIC & ELECTRONIC INTEGRATED CIRCUIT DIE
- Publication number 20240329333
- Publication date Oct 3, 2024
- Intel Corporation
- Robert May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER
- Publication number 20240332203
- Publication date Oct 3, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONIC INTEGRATED CIRCUIT PACKAGES AND METHODS OF MANUFACTURING T...
- Publication number 20240321657
- Publication date Sep 26, 2024
- Intel Corporation
- Darko Grujicic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...
- Publication number 20240258240
- Publication date Aug 1, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING
- Publication number 20240243066
- Publication date Jul 18, 2024
- Intel Corporation
- Kristof DARMAWIKARTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONIC INTEGRATED CIRCUITS WITH GLASS CORES
- Publication number 20240219629
- Publication date Jul 4, 2024
- Intel Corporation
- Changhua Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219659
- Publication date Jul 4, 2024
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219660
- Publication date Jul 4, 2024
- Intel Corporation
- Bohan Shan
- G02 - OPTICS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219654
- Publication date Jul 4, 2024
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL SEMICONDUCTOR PACKAGE AND METHOD
- Publication number 20240219656
- Publication date Jul 4, 2024
- Intel Corporation
- Ziyin Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONIC INTEGRATED CIRCUIT PACKAGE SUBSTRATE WITH VERTICAL OPTICAL...
- Publication number 20240192453
- Publication date Jun 13, 2024
- Intel Corporation
- Changhua Liu
- G02 - OPTICS
Information Patent Application
LITHOGRAPHIC PROCESSES FOR MAKING POLYMER-BASED ELEMENTS
- Publication number 20240184209
- Publication date Jun 6, 2024
- Intel Corporation
- Changhua LIU
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING
- Publication number 20240178145
- Publication date May 30, 2024
- Intel Corporation
- Kristof DARMAWIKARTA
- H01 - BASIC ELECTRIC ELEMENTS

Robert A. May

Person

Patents Grantslast 30 patents

First layer interconnect first on carrier approach for EMIB patch

Lithographic cavity formation to enable EMIB bump pitch scaling

Lithographic cavity formation to enable EMIB bump pitch scaling

Die interconnect substrate, an electrical device and a method for f...

Magneto-optical Kerr effect interconnects for photonic packaging

Multi-chip package with high density interconnects

Panel level packaging for multi-die products interconnected with ve...

Integrated circuit package supports

Microelectronic component having molded regions with through-mold vias

EMIB patch on glass laminate substrate

Microelectronic device with embedded die substrate on interposer

Device and method of very high density routing used with embedded m...

Device and method of very high density routing used with embedded m...

Subtractive etch resolution implementing a functional thin metal re...

Surface finishes with low RBTV for fine and mixed bump pitch archit...

Lithographic cavity formation to enable EMIB bump pitch scaling

Microelectronic structures including bridges

Multi-chip package with high density interconnects

Sacrificial dielectric for lithographic via formation to enable via...

Die interconnect substrate, an electrical device and a method for f...

Embedded die architecture and method of making

Microelectronic device with embedded die substrate on interposer

Methods of embedding magnetic structures in substrates

Patch accommodating embedded dies having different thicknesses

Integrated circuit package supports

Microelectronic component having molded regions with through-mold vias

Die interconnect substrate, an electrical device and a method for f...

Embedded multi-die interconnect bridge packages with lithographical...

Panel level packaging for multi-die products interconnected with ve...

Via structures having tapered profiles for embedded interconnect br...

Patents Applicationslast 30 patents

MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS

METHODS AND APPARATUS TO EMBED SEMICONDUCTOR DEVICES IN CORES OF PA...

DIE AND CONDUCTIVE VIAS EMBEDDED IN A SUBSTRATE

PEDESTAL STRUCTURE FOR PASSIVE CIRCUIT COMPONENT STRUCTURE

DIE WITHIN A HOLE IN A SUBSTRATE CORE ATTACHED TO METAL FEATURES OV...

RESIST TENTING AND PLATING IN CORE CAVITY FOR COMPONENT ATTACHMENT

MICROELECTRONIC ASSEMBLIES WITH STRENGTHENED GLASS CORES

VERTICALLY EMBEDDED PRE-FORMED DEEP TRENCH CAPACITOR MODULES

DIRECT BONDING FOR EMBEDDED BRIDGES WITH VIAS

MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS

PANEL LEVEL PACKAGING FOR MULTI-DIE PRODUCTS INTERCONNECTED WITH VE...

DIE EMBEDDED IN GLASS LAYER WITH TWO-SIDE CONNECTIVITY

ANISOTROPIC CONDUCTIVE CONNECTIONS FOR INTERCONNECT BRIDGES AND REL...

INTEGRATED CIRCUIT PACKAGE SUPPORTS

MICROELECTRONIC COMPONENT HAVING MOLDED REGIONS WITH THROUGH-MOLD VIAS

METHODS AND APPARATUS FOR EDGE PROTECTED GLASS CORES

MICROELECTRONIC ASSEMBLIES INCLUDING A PHOTOIMAGEABLE DIELECTRIC FO...

CO-PACKAGING OF PHOTONIC & ELECTRONIC INTEGRATED CIRCUIT DIE

MICROELECTRONIC DEVICE WITH EMBEDDED DIE SUBSTRATE ON INTERPOSER

PHOTONIC INTEGRATED CIRCUIT PACKAGES AND METHODS OF MANUFACTURING T...

DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...

LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING

PHOTONIC INTEGRATED CIRCUITS WITH GLASS CORES

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

OPTICAL SEMICONDUCTOR PACKAGE AND METHOD

PHOTONIC INTEGRATED CIRCUIT PACKAGE SUBSTRATE WITH VERTICAL OPTICAL...

LITHOGRAPHIC PROCESSES FOR MAKING POLYMER-BASED ELEMENTS

LITHOGRAPHIC CAVITY FORMATION TO ENABLE EMIB BUMP PITCH SCALING