Robert A. McGowan

Person

Cedar Park, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Freedom from interference for aggregated communication channel hand...
- Patent number 11,755,361
- Issue date Sep 12, 2023
- NXP B.V.
- Brian Christopher Kahne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan path only one-bit scan register when component not selected
- Patent number 10,048,314
- Issue date Aug 14, 2018
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Status register between test data I/O of scan port SUT
- Patent number 9,903,912
- Issue date Feb 27, 2018
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug method and device for providing indexed trace messages
- Patent number 9,626,279
- Issue date Apr 18, 2017
- NXP USA, INC.
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug method and device for handling exceptions and interrupts
- Patent number 9,626,280
- Issue date Apr 18, 2017
- NXP USA, INC.
- Robert N. Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 9,612,283
- Issue date Apr 4, 2017
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predicate trace compression
- Patent number 9,495,169
- Issue date Nov 15, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Robert N. Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 9,395,413
- Issue date Jul 19, 2016
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
System and method for multicore processing
- Patent number 9,304,880
- Issue date Apr 5, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Michael L. Olivarez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 9,285,426
- Issue date Mar 15, 2016
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 9,157,958
- Issue date Oct 13, 2015
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 9,063,197
- Issue date Jun 23, 2015
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Blocking the effects of scan chain testing upon a change in scan ch...
- Patent number 8,938,651
- Issue date Jan 20, 2015
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Heterogeneous multi-core integrated circuit and method for debuggin...
- Patent number 8,666,690
- Issue date Mar 4, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Amar Nath Deogharia
- G01 - MEASURING TESTING
Information Patent Grant
Test port connected to master output of override selection logic
- Patent number 8,656,234
- Issue date Feb 18, 2014
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Cache result register for quick cache information lookup
- Patent number 8,572,323
- Issue date Oct 29, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Robert Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Select, override and master override controlling multiplexing TDI a...
- Patent number 8,464,111
- Issue date Jun 11, 2013
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
TDI multiplexer gating controlled by override selection logic
- Patent number 8,359,502
- Issue date Jan 22, 2013
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Select signal and component override signal controlling multiplexin...
- Patent number 8,261,143
- Issue date Sep 4, 2012
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for test and debug of a processor/core having...
- Patent number 8,181,067
- Issue date May 15, 2012
- Texas Instruments Incorporated
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing on-chip data processor trace and timing information f...
- Patent number 7,890,316
- Issue date Feb 15, 2011
- Texas Instruments Incorporated
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for coupling a plurality of test access ports...
- Patent number 7,676,698
- Issue date Mar 9, 2010
- Texas Instruments Incorporated
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for test and debug of a processor/core having...
- Patent number 7,558,984
- Issue date Jul 7, 2009
- Texas Instruments Incorporated
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for controlling power, clock, and reset during...
- Patent number 7,536,597
- Issue date May 19, 2009
- Texas Instruments Incorporated
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correlating on-chip data processor trace information for export
- Patent number 7,315,808
- Issue date Jan 1, 2008
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing on-chip data processor trace and timing information f...
- Patent number 7,043,418
- Issue date May 9, 2006
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obtaining and exporting on-chip data processor trace and timing inf...
- Patent number 6,985,848
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seat and storage bin cover assembly
- Patent number 6,983,985
- Issue date Jan 10, 2006
- DaimlerChrysler Corporation
- Robert McGowan
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Multiprocessor emulation support using dynamic linking
- Patent number 6,931,636
- Issue date Aug 16, 2005
- Texas Instruments Incorporated
- Douglas Deao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Waveguide foreign object damage prevention window
- Patent number 6,867,401
- Issue date Mar 15, 2005
- Communications & Power Industries, Inc.
- William Conway
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE LEVEL SOC RESOURCE ALLOCATION AND ISOLATION SYSTEM AND METHOD
- Publication number 20240403247
- Publication date Dec 5, 2024
- NXP B.V.
- Robert Anthony McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE VIRTUALIZED CONTROLLER AREA NETWORK SYSTEM
- Publication number 20240297807
- Publication date Sep 5, 2024
- NXP B.V.
- Arun Kumar Barman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Freedom from Interference for Aggregated Communication Channel Hand...
- Publication number 20230117223
- Publication date Apr 20, 2023
- NXP B.V.
- Brian Christopher Kahne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20180136278
- Publication date May 17, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
STATUS REGISTER BETWEEN TEST DATA I/O OF SCAN PORT SUT
- Publication number 20170160344
- Publication date Jun 8, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20160299191
- Publication date Oct 13, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20160154058
- Publication date Jun 2, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20160003905
- Publication date Jan 7, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20150253386
- Publication date Sep 10, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20150095730
- Publication date Apr 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
DEBUG METHOD AND DEVICE FOR PROVIDING INDEXED TRACE MESSAGES
- Publication number 20150006863
- Publication date Jan 1, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG METHOD AND DEVICE FOR HANDLING EXCEPTIONS AND INTERRUPTS
- Publication number 20150006869
- Publication date Jan 1, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Robert N. Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MULTICORE PROCESSING
- Publication number 20140281735
- Publication date Sep 18, 2014
- Michael L. Olivarez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20140122953
- Publication date May 1, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
PREDICATE TRACE COMPRESSION
- Publication number 20130283020
- Publication date Oct 24, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Robert N. Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20130227365
- Publication date Aug 29, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20130103995
- Publication date Apr 25, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G01 - MEASURING TESTING
Information Patent Application
HETEROGENEOUS MULTI-CORE INTEGRATED CIRCUIT AND METHOD FOR DEBUGGIN...
- Publication number 20130090887
- Publication date Apr 11, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Amar Nath Deogharia
- G01 - MEASURING TESTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20120297260
- Publication date Nov 22, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. SWOBODA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Result Register for Quick Cache Information Lookup
- Publication number 20120173825
- Publication date Jul 5, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Robert Ehrlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Auto Substitution Collateral Management System and Method
- Publication number 20110191233
- Publication date Aug 4, 2011
- Thomas Michael Russo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Emulation export sequence with distrubuted control
- Publication number 20090216521
- Publication date Aug 27, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for test and debug of a processor/core having...
- Publication number 20090177923
- Publication date Jul 9, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...
- Publication number 20090013226
- Publication date Jan 8, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. SWOBODA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Emulation export sequence with distributed control
- Publication number 20070150255
- Publication date Jun 28, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for coupling a plurality of test access ports...
- Publication number 20060277436
- Publication date Dec 7, 2006
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for test and debug of a processor/core having...
- Publication number 20060248394
- Publication date Nov 2, 2006
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for controlling power, clock, and reset during...
- Publication number 20060248395
- Publication date Nov 2, 2006
- Robert A. McGowan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing On-Chip Data Processor Trace and Timing Information f...
- Publication number 20060195311
- Publication date Aug 31, 2006
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEAT AND STORAGE BIN COVER ASSEMBLY
- Publication number 20050269843
- Publication date Dec 8, 2005
- Robert McGowan
- B60 - VEHICLES IN GENERAL

Robert A. McGowan

Person

Patents Grantslast 30 patents

Freedom from interference for aggregated communication channel hand...

Scan path only one-bit scan register when component not selected

Status register between test data I/O of scan port SUT

Debug method and device for providing indexed trace messages

Debug method and device for handling exceptions and interrupts

Blocking the effects of scan chain testing upon a change in scan ch...

Predicate trace compression

Blocking the effects of scan chain testing upon a change in scan ch...

System and method for multicore processing

Blocking the effects of scan chain testing upon a change in scan ch...

Blocking the effects of scan chain testing upon a change in scan ch...

Blocking the effects of scan chain testing upon a change in scan ch...

Blocking the effects of scan chain testing upon a change in scan ch...

Heterogeneous multi-core integrated circuit and method for debuggin...

Test port connected to master output of override selection logic

Cache result register for quick cache information lookup

Select, override and master override controlling multiplexing TDI a...

TDI multiplexer gating controlled by override selection logic

Select signal and component override signal controlling multiplexin...

Apparatus and method for test and debug of a processor/core having...

Synchronizing on-chip data processor trace and timing information f...

Apparatus and method for coupling a plurality of test access ports...

Apparatus and method for test and debug of a processor/core having...

Apparatus and method for controlling power, clock, and reset during...

Correlating on-chip data processor trace information for export

Synchronizing on-chip data processor trace and timing information f...

Obtaining and exporting on-chip data processor trace and timing inf...

Seat and storage bin cover assembly

Multiprocessor emulation support using dynamic linking

Waveguide foreign object damage prevention window

Patents Applicationslast 30 patents

MULTIPLE LEVEL SOC RESOURCE ALLOCATION AND ISOLATION SYSTEM AND METHOD

SCALABLE VIRTUALIZED CONTROLLER AREA NETWORK SYSTEM

Freedom from Interference for Aggregated Communication Channel Hand...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

STATUS REGISTER BETWEEN TEST DATA I/O OF SCAN PORT SUT

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

DEBUG METHOD AND DEVICE FOR PROVIDING INDEXED TRACE MESSAGES

DEBUG METHOD AND DEVICE FOR HANDLING EXCEPTIONS AND INTERRUPTS

SYSTEM AND METHOD FOR MULTICORE PROCESSING

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

PREDICATE TRACE COMPRESSION

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

HETEROGENEOUS MULTI-CORE INTEGRATED CIRCUIT AND METHOD FOR DEBUGGIN...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

Cache Result Register for Quick Cache Information Lookup

Auto Substitution Collateral Management System and Method

Emulation export sequence with distrubuted control

Apparatus and method for test and debug of a processor/core having...

BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CH...

Emulation export sequence with distributed control

Apparatus and method for coupling a plurality of test access ports...

Apparatus and method for test and debug of a processor/core having...

Apparatus and method for controlling power, clock, and reset during...

Synchronizing On-Chip Data Processor Trace and Timing Information f...

SEAT AND STORAGE BIN COVER ASSEMBLY