Robert Alan Philhower

Person

Valley Cottage, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamic fusion based on operand size
- Patent number 11,157,280
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-cycle latch tree synthesis
- Patent number 11,074,379
- Issue date Jul 27, 2021
- International Business Machines Corporation
- Lakshmi N. Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tagging target branch predictors with context with index modificati...
- Patent number 10,740,104
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Jentje Leenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Effective address based instruction fetch unit for out of order pro...
- Patent number 10,579,384
- Issue date Mar 3, 2020
- International Business Machines Corporation
- Robert A. Philhower
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management of branch predictors in a computer processor
- Patent number 10,552,159
- Issue date Feb 4, 2020
- International Business Machines Corporation
- David S. Levitan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management of branch predictors in a computer processor
- Patent number 10,037,207
- Issue date Jul 31, 2018
- International Business Machines Corporation
- David S. Levitan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management of branch predictors in a computer processor
- Patent number 9,996,351
- Issue date Jun 12, 2018
- International Business Machines Corporation
- David S. Levitan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for thread priority control in a multi-threade...
- Patent number 8,255,669
- Issue date Aug 28, 2012
- International Business Machines Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for inhibiting fetch throttling when a process...
- Patent number 8,006,070
- Issue date Aug 23, 2011
- International Business Machines Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling memory array gating when a pro...
- Patent number 7,925,853
- Issue date Apr 12, 2011
- International Business Machines Corporation
- Michael Karl Gschwind
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Time-of-life counter for handling instruction flushes from a queue
- Patent number 7,913,070
- Issue date Mar 22, 2011
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and computer program product for path-correlated in...
- Patent number 7,797,521
- Issue date Sep 14, 2010
- International Business Machines Corporation
- Richard J. Eickemeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alignment of cache fetch return data relative to a thread
- Patent number 7,725,659
- Issue date May 25, 2010
- International Business Machines Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power management in a processor design
- Patent number 7,681,056
- Issue date Mar 16, 2010
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for conserving power by throttling instruction...
- Patent number 7,627,742
- Issue date Dec 1, 2009
- International Business Machines Corporation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Soft error handling in microprocessors
- Patent number 7,512,772
- Issue date Mar 31, 2009
- International Business Machines Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time-of-life counter design for handling instruction flushes from a...
- Patent number 7,490,224
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power management in a processor design
- Patent number 7,401,242
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for high frequency stall design
- Patent number 7,370,176
- Issue date May 6, 2008
- International Business Machines Corporation
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous dual rail static carry-save-adder circuit using silico...
- Patent number 6,785,703
- Issue date Aug 31, 2004
- International Business Machines Corporation
- Douglas Hooker Bradley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
4:2 compressor circuit for use in an arithmetic unit
- Patent number 6,711,633
- Issue date Mar 23, 2004
- International Business Machines Corporation
- Douglas Hooker Bradley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synthesizing and optimizing control logic...
- Patent number 6,131,182
- Issue date Oct 10, 2000
- International Business Machines Corporation
- Michael Patrick Beakes
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-CYCLE LATCH TREE SYNTHESIS
- Publication number 20200311221
- Publication date Oct 1, 2020
- International Business Machines Corporation
- Lakshmi N. Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tagging target branch predictors with context with index modifictio...
- Publication number 20200057641
- Publication date Feb 20, 2020
- International Business Machines Corporation
- Jentje Leenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC FUSION BASED ON OPERAND SIZE
- Publication number 20190179639
- Publication date Jun 13, 2019
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFECTIVE ADDRESS BASED INSTRUCTION FETCH UNIT FOR OUT OF ORDER PRO...
- Publication number 20190179641
- Publication date Jun 13, 2019
- International Business Machines Corporation
- Robert A. Philhower
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR
- Publication number 20180275993
- Publication date Sep 27, 2018
- International Business Machines Corporation
- DAVID S. LEVITAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR
- Publication number 20170344377
- Publication date Nov 30, 2017
- International Business Machines Corporation
- DAVID S. LEVITAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR
- Publication number 20170344372
- Publication date Nov 30, 2017
- International Business Machines Corporation
- DAVID S. LEVITAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR OPTIMIZED METHOD OF BHT BANKING AND MULTIP...
- Publication number 20100031011
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INCREASING THREAD PRIORITY IN RESPONSE TO...
- Publication number 20090193240
- Publication date Jul 30, 2009
- IBM Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR THREAD PRIORITY CONTROL IN A MULTI-THREADE...
- Publication number 20090193231
- Publication date Jul 30, 2009
- IBM Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Controlling Memory Array Gating when a Pro...
- Publication number 20090177858
- Publication date Jul 9, 2009
- IBM Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Inhibiting Fetch Throttling When a Process...
- Publication number 20090150657
- Publication date Jun 11, 2009
- IBM Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Alignment of Cache Fetch Return Data Relative to a Thread
- Publication number 20090063818
- Publication date Mar 5, 2009
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Time-Of-Life Counter For Handling Instruction Flushes From A Queue
- Publication number 20090043997
- Publication date Feb 12, 2009
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Conserving Power by Throttling Instruction...
- Publication number 20080256345
- Publication date Oct 16, 2008
- IBM Corporation
- Pradip Bose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PATH-CORRELATED IN...
- Publication number 20080256347
- Publication date Oct 16, 2008
- International Business Machines Corporation
- Richard J. Eickemeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Power Management in a Processor Design
- Publication number 20080229078
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFT ERROR HANDLING IN MICROPROCESSORS
- Publication number 20080168305
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Michael Karl Gschwind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTIPLE ARRAY LOW-POWER OPERATION MODES
- Publication number 20080164933
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Michael Karl Gschwind
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High Frequency Stall Design
- Publication number 20080148021
- Publication date Jun 19, 2008
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR DESIGNING A MEMORY REGISTER
- Publication number 20080127019
- Publication date May 29, 2008
- International Business Machines Corporation
- Niv Amit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for time-of-life counter design for handling inst...
- Publication number 20070083742
- Publication date Apr 12, 2007
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for dynamic power management in a processor design
- Publication number 20070074059
- Publication date Mar 29, 2007
- Christopher Michael Abernathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for high frequency stall design
- Publication number 20070043931
- Publication date Feb 22, 2007
- Jonathan James DeMent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
4:2 Compressor circuit for use in an arithmetic unit
- Publication number 20030145032
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Douglas Hooker Bradley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simultaneous dual rail static carry-save-adder circuit
- Publication number 20030005017
- Publication date Jan 2, 2003
- International Buisness Machines Corp.
- Douglas Hooker Bradley
- G06 - COMPUTING CALCULATING COUNTING

Robert Alan Philhower

Person

Patents Grantslast 30 patents

Dynamic fusion based on operand size

Multi-cycle latch tree synthesis

Tagging target branch predictors with context with index modificati...

Effective address based instruction fetch unit for out of order pro...

Power management of branch predictors in a computer processor

Power management of branch predictors in a computer processor

Power management of branch predictors in a computer processor

Method and apparatus for thread priority control in a multi-threade...

Method and apparatus for inhibiting fetch throttling when a process...

Method and apparatus for controlling memory array gating when a pro...

Time-of-life counter for handling instruction flushes from a queue

Method, system, and computer program product for path-correlated in...

Alignment of cache fetch return data relative to a thread

Dynamic power management in a processor design

Method and apparatus for conserving power by throttling instruction...

Soft error handling in microprocessors

Time-of-life counter design for handling instruction flushes from a...

Dynamic power management in a processor design

System and method for high frequency stall design

Simultaneous dual rail static carry-save-adder circuit using silico...

4:2 compressor circuit for use in an arithmetic unit

Method and apparatus for synthesizing and optimizing control logic...

Patents Applicationslast 30 patents

MULTI-CYCLE LATCH TREE SYNTHESIS

Tagging target branch predictors with context with index modifictio...

DYNAMIC FUSION BASED ON OPERAND SIZE

EFFECTIVE ADDRESS BASED INSTRUCTION FETCH UNIT FOR OUT OF ORDER PRO...

POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR

POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR

POWER MANAGEMENT OF BRANCH PREDICTORS IN A COMPUTER PROCESSOR

METHOD AND APPARATUS FOR OPTIMIZED METHOD OF BHT BANKING AND MULTIP...

METHOD AND APPARATUS FOR INCREASING THREAD PRIORITY IN RESPONSE TO...

METHOD AND APPARATUS FOR THREAD PRIORITY CONTROL IN A MULTI-THREADE...

Method and Apparatus for Controlling Memory Array Gating when a Pro...

Method and Apparatus for Inhibiting Fetch Throttling When a Process...

Alignment of Cache Fetch Return Data Relative to a Thread

Time-Of-Life Counter For Handling Instruction Flushes From A Queue

Method and Apparatus for Conserving Power by Throttling Instruction...

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR PATH-CORRELATED IN...

Dynamic Power Management in a Processor Design

SOFT ERROR HANDLING IN MICROPROCESSORS

METHOD AND APPARATUS FOR MULTIPLE ARRAY LOW-POWER OPERATION MODES

High Frequency Stall Design

METHOD AND SYSTEM FOR DESIGNING A MEMORY REGISTER

System and method for time-of-life counter design for handling inst...

System and method for dynamic power management in a processor design

System and method for high frequency stall design

4:2 Compressor circuit for use in an arithmetic unit

Simultaneous dual rail static carry-save-adder circuit