ROBERT B. STASZEWSKI

Person

GARLAND, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Phase domain calculator clock, ALU, memory, register file, sequence...
- Patent number 9,853,649
- Issue date Dec 26, 2017
- Texas Instruments Incorporated
- Roman Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Software reconfigurable digital phase lock loop architecture
- Patent number 9,473,155
- Issue date Oct 18, 2016
- Texas Instruments Incorporated
- Roman Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
ASIP with reconfigurable circuitry implementing atomic operations o...
- Patent number 9,116,769
- Issue date Aug 25, 2015
- Texas Instruments Incorporated
- Roman Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Linearization and calibration predistortion of a digitally controll...
- Patent number 9,020,454
- Issue date Apr 28, 2015
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital amplitude modulation
- Patent number 8,855,236
- Issue date Oct 7, 2014
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power all digital PLL architecture
- Patent number 8,830,001
- Issue date Sep 9, 2014
- Texas Instruments Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
All-digital frequency synthesis with DCO gain calculation
- Patent number 8,559,579
- Issue date Oct 15, 2013
- Texas Instruments Incorporated
- Robert B. Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Simultaneous multiple signal reception and transmission using frequ...
- Patent number 8,542,616
- Issue date Sep 24, 2013
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Predistortion calibration and built in self testing of a radio freq...
- Patent number 8,463,189
- Issue date Jun 11, 2013
- Texas Instruments Incorporated
- Imran Bashir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital amplitude modulation
- Patent number 8,411,793
- Issue date Apr 2, 2013
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop
- Patent number 8,385,476
- Issue date Feb 26, 2013
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Software reconfigurable digital phase lock loop architecture
- Patent number 8,321,489
- Issue date Nov 27, 2012
- National Semiconductor Corporation
- Roman Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fine-grained gear-shifting of a digital phase-locked loop (PLL)
- Patent number 8,306,176
- Issue date Nov 6, 2012
- Texas Instruments Incorporated
- Robert B. Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Radio frequency built-in self test for quality monitoring of local...
- Patent number 8,284,886
- Issue date Oct 9, 2012
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bandwidth reduction mechanism for polar modulation
- Patent number 8,204,107
- Issue date Jun 19, 2012
- National Semiconductor Corporation
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for asynchronous clock retiming
- Patent number 8,155,256
- Issue date Apr 10, 2012
- Texas Instruments Incorporated
- Robert B. Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power amplifier with two transistors and traces forming two transfo...
- Patent number 8,130,040
- Issue date Mar 6, 2012
- Texas Instruments Incorporated
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transmitter PLL with bandwidth on demand
- Patent number 8,126,401
- Issue date Feb 28, 2012
- Texas Instruments Incorporated
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop with integer channel mitigation
- Patent number 8,050,375
- Issue date Nov 1, 2011
- Texas Instruments Incorporated
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Binary ripple counter sampling with adjustable delays
- Patent number 8,045,662
- Issue date Oct 25, 2011
- Texas Instruments Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interpolative all-digital phase locked loop
- Patent number 8,045,670
- Issue date Oct 25, 2011
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sampling mixer with asynchronous clock and signal domains
- Patent number 8,027,657
- Issue date Sep 27, 2011
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Parallel redundant single-electron device and method of manufacture
- Patent number 8,017,935
- Issue date Sep 13, 2011
- Texas Instruments Incorporated
- Robert B. Staszewski
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Removing close-in interferers through a feedback loop
- Patent number 8,000,670
- Issue date Aug 16, 2011
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
All-digital frequency synthesis with DCO gain calculation
- Patent number 8,000,428
- Issue date Aug 16, 2011
- Texas Instruments Incorporated
- Robert B. Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable delay oscillator buffer
- Patent number 7,983,375
- Issue date Jul 19, 2011
- Texas Instruments Incorporated
- Fikret Dulger
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Computation spreading for spur reduction in a digital phase lock loop
- Patent number 7,936,221
- Issue date May 3, 2011
- Texas Instruments Incorporated
- Roman Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Local oscillator incorporating phase command exception handling uti...
- Patent number 7,936,229
- Issue date May 3, 2011
- Texas Instruments Incorporated
- Siraj Akhtar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for digital amplitude and phase modulation
- Patent number 7,929,637
- Issue date Apr 19, 2011
- Texas Instruments Incorporated
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop with dithering
- Patent number 7,920,081
- Issue date Apr 5, 2011
- Texas Instruments Incorporated
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE
- Publication number 20170005666
- Publication date Jan 5, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Roman Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE
- Publication number 20150318861
- Publication date Nov 5, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Roman Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE
- Publication number 20130080495
- Publication date Mar 28, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Roman Staszewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEARIZATION OF A TRANSMIT AMPLIFIER
- Publication number 20120263256
- Publication date Oct 18, 2012
- Khurram Waheed
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PREDISTORTION CALIBRATION AND BUILT IN SELF TESTING OF A RADIO FREQ...
- Publication number 20120252382
- Publication date Oct 4, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Imran Bashir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MINIMIZATION OF RMS PHASE ERROR IN A PHASE LOCKED LOOP BY DITHERING...
- Publication number 20120244824
- Publication date Sep 27, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Manouchehr Entezari
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital Amplitude Modulation
- Publication number 20120007687
- Publication date Jan 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ALL-DIGITAL FREQUENCY SYNTHESIS WITH DCO GAIN CALCULATION
- Publication number 20110261871
- Publication date Oct 27, 2011
- Robert B. Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL AMPLITUDE MODULATION
- Publication number 20110182382
- Publication date Jul 28, 2011
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL PHASE LOCKED LOOP WITH DITHERING
- Publication number 20110148676
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Khurram Waheed
- G04 - HOROLOGY
Information Patent Application
DIGITAL PHASE LOCKED LOOP WITH DITHERING
- Publication number 20100283654
- Publication date Nov 11, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Khurram Waheed
- G04 - HOROLOGY
Information Patent Application
Mitigation of RF Oscillator Pulling through Adjustable Phase Shifting
- Publication number 20100283665
- Publication date Nov 11, 2010
- Imran Bashir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED POWER AMPLIFIER
- Publication number 20100271131
- Publication date Oct 28, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PREDISTORTION MECHANISM FOR COMPENSATION OF TRANSISTOR SIZE MISMATC...
- Publication number 20100188148
- Publication date Jul 29, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Jaimin A. Mehta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
UPSAMPLING/INTERPOLATION AND TIME ALIGNMENT MECHANISM UTILIZING INJ...
- Publication number 20100135368
- Publication date Jun 3, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Jaimin A. Mehta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIMULTANEOUS MULTIPLE SIGNAL RECEPTION AND TRANSMISSION USING FREQU...
- Publication number 20100091688
- Publication date Apr 15, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED POWER AMPLIFIER
- Publication number 20100007423
- Publication date Jan 14, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transmitter PLL with Bandwidth on Demand
- Publication number 20090325494
- Publication date Dec 31, 2009
- Robert Bogdan Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Computation spreading utilizing dithering for spur reduction in a d...
- Publication number 20090262877
- Publication date Oct 22, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Fuqiang Shi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BANDWIDTH REDUCTION MECHANISM FOR POLAR MODULATION
- Publication number 20090258612
- Publication date Oct 15, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Predistortion Calibration In A Transceiver Assembly
- Publication number 20090207940
- Publication date Aug 20, 2009
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Direct Radio Frequency (RF) Sampling With Recursive Filtering Method
- Publication number 20090196384
- Publication date Aug 6, 2009
- Robert B. Staszewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Impedance Mismatch Compensation in Digital Co...
- Publication number 20090175378
- Publication date Jul 9, 2009
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Power amplifier
- Publication number 20090096525
- Publication date Apr 16, 2009
- TEXAS INSTRUMENTS
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Computation parallelization in software reconfigurable all digital...
- Publication number 20090070568
- Publication date Mar 12, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Fuqiang Shi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interpolative All-Digital Phase Locked Loop
- Publication number 20080317187
- Publication date Dec 25, 2008
- Khurram Waheed
- G04 - HOROLOGY
Information Patent Application
Digital Phase Locked Loop with Integer Channel Mitigation
- Publication number 20080317188
- Publication date Dec 25, 2008
- Robert Bogdan Staszewski
- G04 - HOROLOGY
Information Patent Application
BINARY RIPPLE COUNTER SAMPLING WITH ADJUSTABLE DELAYS
- Publication number 20080317189
- Publication date Dec 25, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Jingchen Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL PHASE LOCKED LOOP WITH DITHERING
- Publication number 20080315928
- Publication date Dec 25, 2008
- Khurram WAHEED
- G04 - HOROLOGY
Information Patent Application
Integrated Power Amplifier
- Publication number 20080315954
- Publication date Dec 25, 2008
- TEXAS INSTRUMENTS
- Robert Bogdan Staszewski
- H03 - BASIC ELECTRONIC CIRCUITRY

ROBERT B. STASZEWSKI

Person

Patents Grantslast 30 patents

Phase domain calculator clock, ALU, memory, register file, sequence...

Software reconfigurable digital phase lock loop architecture

ASIP with reconfigurable circuitry implementing atomic operations o...

Linearization and calibration predistortion of a digitally controll...

Digital amplitude modulation

Low power all digital PLL architecture

All-digital frequency synthesis with DCO gain calculation

Simultaneous multiple signal reception and transmission using frequ...

Predistortion calibration and built in self testing of a radio freq...

Digital amplitude modulation

Digital phase locked loop

Software reconfigurable digital phase lock loop architecture

Fine-grained gear-shifting of a digital phase-locked loop (PLL)

Radio frequency built-in self test for quality monitoring of local...

Bandwidth reduction mechanism for polar modulation

Method and apparatus for asynchronous clock retiming

Power amplifier with two transistors and traces forming two transfo...

Transmitter PLL with bandwidth on demand

Digital phase locked loop with integer channel mitigation

Binary ripple counter sampling with adjustable delays

Interpolative all-digital phase locked loop

Sampling mixer with asynchronous clock and signal domains

Parallel redundant single-electron device and method of manufacture

Removing close-in interferers through a feedback loop

All-digital frequency synthesis with DCO gain calculation

Variable delay oscillator buffer

Computation spreading for spur reduction in a digital phase lock loop

Local oscillator incorporating phase command exception handling uti...

Method and apparatus for digital amplitude and phase modulation

Digital phase locked loop with dithering

Patents Applicationslast 30 patents

SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE

SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE

SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE

LINEARIZATION OF A TRANSMIT AMPLIFIER

PREDISTORTION CALIBRATION AND BUILT IN SELF TESTING OF A RADIO FREQ...

MINIMIZATION OF RMS PHASE ERROR IN A PHASE LOCKED LOOP BY DITHERING...

Digital Amplitude Modulation

ALL-DIGITAL FREQUENCY SYNTHESIS WITH DCO GAIN CALCULATION

DIGITAL AMPLITUDE MODULATION

DIGITAL PHASE LOCKED LOOP WITH DITHERING

DIGITAL PHASE LOCKED LOOP WITH DITHERING

Mitigation of RF Oscillator Pulling through Adjustable Phase Shifting

INTEGRATED POWER AMPLIFIER

PREDISTORTION MECHANISM FOR COMPENSATION OF TRANSISTOR SIZE MISMATC...

UPSAMPLING/INTERPOLATION AND TIME ALIGNMENT MECHANISM UTILIZING INJ...

SIMULTANEOUS MULTIPLE SIGNAL RECEPTION AND TRANSMISSION USING FREQU...

INTEGRATED POWER AMPLIFIER

Transmitter PLL with Bandwidth on Demand

Computation spreading utilizing dithering for spur reduction in a d...

BANDWIDTH REDUCTION MECHANISM FOR POLAR MODULATION

Predistortion Calibration In A Transceiver Assembly

Direct Radio Frequency (RF) Sampling With Recursive Filtering Method

System and Method for Impedance Mismatch Compensation in Digital Co...

Power amplifier

Computation parallelization in software reconfigurable all digital...

Interpolative All-Digital Phase Locked Loop

Digital Phase Locked Loop with Integer Channel Mitigation

BINARY RIPPLE COUNTER SAMPLING WITH ADJUSTABLE DELAYS

DIGITAL PHASE LOCKED LOOP WITH DITHERING

Integrated Power Amplifier