Robert Bedichek

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Translating instructions in a speculative processor
- Patent number 9,875,103
- Issue date Jan 23, 2018
- Intellectual Ventures Holding 81 LLC
- Linus Torvalds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for integration of interpretation and translation in a micro...
- Patent number 8,418,153
- Issue date Apr 9, 2013
- Robert Bedichek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checking for instruction invariance to execute previously obtained...
- Patent number 7,904,891
- Issue date Mar 8, 2011
- John Banning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for switching between interpretation and dynamic translation...
- Patent number 7,761,857
- Issue date Jul 20, 2010
- Robert Bedichek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for translating instructions in a speculative microprocessor
- Patent number 7,694,113
- Issue date Apr 6, 2010
- Linus Torvalds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interpage prologue to protect virtual address mappings
- Patent number 7,617,088
- Issue date Nov 10, 2009
- Robert Bedichek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switching to original code comparison of modifiable code for transl...
- Patent number 7,404,181
- Issue date Jul 22, 2008
- Transmeta Corporation
- John Banning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switching to original modifiable instruction copy comparison check...
- Patent number 7,096,460
- Issue date Aug 22, 2006
- Transmeta Corporation
- John Banning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for translating instructions in a speculative microprocessor...
- Patent number 6,990,658
- Issue date Jan 24, 2006
- Transmeta Corporation
- Linus Torvalds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for translating instructions in a speculative microprocessor...
- Patent number 6,871,342
- Issue date Mar 22, 2005
- Transmeta Corporation
- Linus Torvalds
Information Patent Grant
Interpage prologue to protect virtual address mappings
- Patent number 6,845,353
- Issue date Jan 18, 2005
- Transmeta Corporation
- Robert Bedichek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation consistency checking for modified target instructions b...
- Patent number 6,594,821
- Issue date Jul 15, 2003
- Transmeta Corporation
- John Banning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maintaining context while executing transl...
- Patent number 6,415,379
- Issue date Jul 2, 2002
- Transmeta Corporation
- David Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for correcting errors in computer systems
- Patent number 5,905,855
- Issue date May 18, 1999
- Transmeta Corporation
- Alex Klaiber
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONSISTENCY CHECKING FOR TRANSLATED INTRUCTIONS
- Publication number 20120036502
- Publication date Feb 9, 2012
- John Banning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR INTEGRATION OF INTERPRETATION AND TRANSLATION IN A MICRO...
- Publication number 20100262955
- Publication date Oct 14, 2010
- Robert Bedichek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATING INSTRUCTIONS IN A SPECULATIVE PROCESSOR
- Publication number 20100169613
- Publication date Jul 1, 2010
- Linus Torvalds
- G06 - COMPUTING CALCULATING COUNTING

Robert Bedichek

Person

Patents Grantslast 30 patents

Translating instructions in a speculative processor

Method for integration of interpretation and translation in a micro...

Checking for instruction invariance to execute previously obtained...

Method for switching between interpretation and dynamic translation...

Method for translating instructions in a speculative microprocessor

Interpage prologue to protect virtual address mappings

Switching to original code comparison of modifiable code for transl...

Switching to original modifiable instruction copy comparison check...

Method for translating instructions in a speculative microprocessor...

Method for translating instructions in a speculative microprocessor...

Interpage prologue to protect virtual address mappings

Translation consistency checking for modified target instructions b...

Method and apparatus for maintaining context while executing transl...

Method and apparatus for correcting errors in computer systems

Patents Applicationslast 30 patents

CONSISTENCY CHECKING FOR TRANSLATED INTRUCTIONS

METHOD FOR INTEGRATION OF INTERPRETATION AND TRANSLATION IN A MICRO...

TRANSLATING INSTRUCTIONS IN A SPECULATIVE PROCESSOR