Robert F. Walker

Person

St. George, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 8,464,189
- Issue date Jun 11, 2013
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive weighting method for layout optimization with multiple pri...
- Patent number 7,895,562
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit selective scaling
- Patent number 7,882,463
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout optimization using parameterized cells
- Patent number 7,865,848
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC layout optimization to improve yield
- Patent number 7,818,694
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,761,821
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and computer program product for displaying and...
- Patent number 7,752,589
- Issue date Jul 6, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware sub-circuit layout modification
- Patent number 7,735,042
- Issue date Jun 8, 2010
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,610,565
- Issue date Oct 27, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent migration of hierarchical designs with methods of findi...
- Patent number 7,568,173
- Issue date Jul 28, 2009
- International Business Machines Corporation
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC layout optimization to improve yield
- Patent number 7,503,020
- Issue date Mar 10, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimum layout perturbation-based artwork legalization with grid co...
- Patent number 7,484,197
- Issue date Jan 27, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus and computer program product for optimizing an in...
- Patent number 7,454,721
- Issue date Nov 18, 2008
- International Business Machines Corporation
- Jason D. Hibbeler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit selective scaling
- Patent number 7,363,601
- Issue date Apr 22, 2008
- International Business Machines Corporation
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,302,651
- Issue date Nov 27, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit yield enhancement using Voronoi diagrams
- Patent number 7,260,790
- Issue date Aug 21, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology migration for integrated circuits with radical design re...
- Patent number 7,257,783
- Issue date Aug 14, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cloned and original circuit shape merging
- Patent number 7,120,887
- Issue date Oct 10, 2006
- International Business Machines Corporation
- Henry A. Bonges, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit area minimization using scaling
- Patent number 7,117,456
- Issue date Oct 3, 2006
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for obtaining a feasible integer solution from a...
- Patent number 7,062,729
- Issue date Jun 13, 2006
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Entity control for raster displays
- Patent number 4,516,266
- Issue date May 7, 1985
- International Business Machines Corporation
- Robert J. Christopher
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SCHEMATIC-BASED LAYOUT MIGRATION
- Publication number 20120233576
- Publication date Sep 13, 2012
- International Business Machines Corporation
- Geoffrey R. Barrows
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20100185997
- Publication date Jul 22, 2010
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE WEIGHTING METHOD FOR LAYOUT OPTIMIZATION WITH MULTIPLE PRI...
- Publication number 20090158223
- Publication date Jun 18, 2009
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IC Layout Optimization to Improve Yield
- Publication number 20090100386
- Publication date Apr 16, 2009
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Layout Optimization Using Parameterized Cells
- Publication number 20090064061
- Publication date Mar 5, 2009
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT AWARE SUB-CIRCUIT LAYOUT MODIFICATION
- Publication number 20090037851
- Publication date Feb 5, 2009
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLYGONAL AREA DESIGN RULE CORRECTION METHOD FOR VLSI LAYOUTS
- Publication number 20090037850
- Publication date Feb 5, 2009
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDEPENDENT MIGRATION OF HIERARCHICAL DESIGNS WITH METHODS OF FINDI...
- Publication number 20080313581
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Veit Gernhoefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF OPTIMIZING HIERARCHICAL VERY LARGE SCALE INTEGRATION (VLS...
- Publication number 20080172638
- Publication date Jul 17, 2008
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR DISPLAYING AND...
- Publication number 20080168414
- Publication date Jul 10, 2008
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT SELECTIVE SCALING
- Publication number 20080148210
- Publication date Jun 19, 2008
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IC Layout Optimization To Improve Yield
- Publication number 20070294648
- Publication date Dec 20, 2007
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20070277129
- Publication date Nov 29, 2007
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MINIMUM LAYOUT PERTURBATION-BASED ARTWORK LEGALIZATION WITH GRID CO...
- Publication number 20070245283
- Publication date Oct 18, 2007
- Robert J Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20070198961
- Publication date Aug 23, 2007
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT YIELD ENHANCEMENT USING VORONOI DIAGRAMS
- Publication number 20060150130
- Publication date Jul 6, 2006
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20060101357
- Publication date May 11, 2006
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...
- Publication number 20060101356
- Publication date May 11, 2006
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT SELECTIVE SCALING
- Publication number 20060085768
- Publication date Apr 20, 2006
- International Business Machines Corporation
- Fook-Luen Heng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for obtaining a feasible integer solution from a...
- Publication number 20060064661
- Publication date Mar 23, 2006
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLONED AND ORIGINAL CIRCUIT SHAPE MERGING
- Publication number 20050160390
- Publication date Jul 21, 2005
- International Business Machines Corporation
- Henry A. Bonges
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT AREA MINIMIZATION USING SCALING
- Publication number 20050125748
- Publication date Jun 9, 2005
- International Business Machines Corporation
- Michael S. Gray
- G06 - COMPUTING CALCULATING COUNTING

Robert F. Walker

Person

Patents Grantslast 30 patents

Technology migration for integrated circuits with radical design re...

Adaptive weighting method for layout optimization with multiple pri...

Integrated circuit selective scaling

Layout optimization using parameterized cells

IC layout optimization to improve yield

Technology migration for integrated circuits with radical design re...

Method, apparatus, and computer program product for displaying and...

Context aware sub-circuit layout modification

Technology migration for integrated circuits with radical design re...

Independent migration of hierarchical designs with methods of findi...

IC layout optimization to improve yield

Minimum layout perturbation-based artwork legalization with grid co...

Method, apparatus and computer program product for optimizing an in...

Integrated circuit selective scaling

Technology migration for integrated circuits with radical design re...

Integrated circuit yield enhancement using Voronoi diagrams

Technology migration for integrated circuits with radical design re...

Cloned and original circuit shape merging

Circuit area minimization using scaling

Method and system for obtaining a feasible integer solution from a...

Entity control for raster displays

Patents Applicationslast 30 patents

SCHEMATIC-BASED LAYOUT MIGRATION

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

ADAPTIVE WEIGHTING METHOD FOR LAYOUT OPTIMIZATION WITH MULTIPLE PRI...

IC Layout Optimization to Improve Yield

Layout Optimization Using Parameterized Cells

CONTEXT AWARE SUB-CIRCUIT LAYOUT MODIFICATION

POLYGONAL AREA DESIGN RULE CORRECTION METHOD FOR VLSI LAYOUTS

INDEPENDENT MIGRATION OF HIERARCHICAL DESIGNS WITH METHODS OF FINDI...

METHOD OF OPTIMIZING HIERARCHICAL VERY LARGE SCALE INTEGRATION (VLS...

METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR DISPLAYING AND...

INTEGRATED CIRCUIT SELECTIVE SCALING

IC Layout Optimization To Improve Yield

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

MINIMUM LAYOUT PERTURBATION-BASED ARTWORK LEGALIZATION WITH GRID CO...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

INTEGRATED CIRCUIT YIELD ENHANCEMENT USING VORONOI DIAGRAMS

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RE...

INTEGRATED CIRCUIT SELECTIVE SCALING

Method and system for obtaining a feasible integer solution from a...

CLONED AND ORIGINAL CIRCUIT SHAPE MERGING

CIRCUIT AREA MINIMIZATION USING SCALING