Robert Glen Gerowitz

Person

Raleigh, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Testing integrated circuit designs containing multiple phase rotators
- Patent number 11,016,144
- Issue date May 25, 2021
- International Business Machines Corporation
- Robert G. Gerowitz
- G01 - MEASURING TESTING
Information Patent Grant
Testing integrated circuit designs containing multiple phase rotators
- Patent number 10,761,136
- Issue date Sep 1, 2020
- International Business Machines Corporation
- Robert G. Gerowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing integrated circuit designs containing multiple phase rotators
- Patent number 10,585,140
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Robert G. Gerowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing integrated circuit designs containing multiple phase rotators
- Patent number 9,927,489
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Robert G. Gerowitz
- G01 - MEASURING TESTING
Information Patent Grant
Validating manufacturing test rules pertaining to an electronic com...
- Patent number 8,135,571
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Carisa Anne Cassani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indeterminate state logic insertion
- Patent number 8,136,059
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Robert Glen Gerowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatically creating manufacturing test rules pertaining to an el...
- Patent number 8,065,641
- Issue date Nov 22, 2011
- International Business Machines Corporation
- Robert Glen Gerowitz
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Scanned memory testing of multi-port memory arrays
- Patent number 7,865,786
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Robert Glen Gerowitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiplexor with leakage power regulator
- Patent number 7,768,315
- Issue date Aug 3, 2010
- International Business Machines Corporation
- Zhibin Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for low-power level-sensitive scan design latch w...
- Patent number 7,646,210
- Issue date Jan 12, 2010
- International Business Machines Corporation
- Zhibin Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scanned memory testing of multi-port memory arrays
- Patent number 7,506,225
- Issue date Mar 17, 2009
- International Business Machines Corporation
- Robert Glen Gerowitz
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for manufacturing test generation
- Patent number 7,127,691
- Issue date Oct 24, 2006
- International Business Machines Corporation
- R. Thomas Cruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan chain connectivity
- Patent number 6,681,356
- Issue date Jan 20, 2004
- International Business Machines Corporation
- Robert Glen Gerowitz
- G01 - MEASURING TESTING
Information Patent Grant
Hardware design language generation for input/output logic level
- Patent number 6,519,757
- Issue date Feb 11, 2003
- International Business Machines Corporation
- Bryan Keith Bullis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with in situ circuit arrangement for testing int...
- Patent number 6,407,569
- Issue date Jun 18, 2002
- International Business Machines Corporation
- Jeffrey Paul Boettler
- G01 - MEASURING TESTING
Information Patent Grant
High speed parallel/serial link for data communication
- Patent number 6,222,380
- Issue date Apr 24, 2001
- International Business Machines Corporation
- Robert Glen Gerowitz
- C22 - METALLURGY FERROUS OR NON-FERROUS ALLOYS TREATMENT OF ALLOYS OR NON-FER...

Patents Applicationslast 30 patents

Information Patent Application
TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS
- Publication number 20200150175
- Publication date May 14, 2020
- International Business Machines Corporation
- Robert G. GEROWITZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS
- Publication number 20180074121
- Publication date Mar 15, 2018
- International Business Machines Corporation
- Robert G. GEROWITZ
- G01 - MEASURING TESTING
Information Patent Application
TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS
- Publication number 20180074120
- Publication date Mar 15, 2018
- International Business Machines Corporation
- Robert G. GEROWITZ
- G01 - MEASURING TESTING
Information Patent Application
TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS
- Publication number 20150198661
- Publication date Jul 16, 2015
- International Business Machines Corporation
- Robert G. GEROWITZ
- G01 - MEASURING TESTING
Information Patent Application
Indeterminate State Logic Insertion
- Publication number 20100107129
- Publication date Apr 29, 2010
- International Business Machines Corporation
- Robert Glen Gerowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATICALLY CREATING MANUFACTURING TEST RULES PERTAINING TO AN EL...
- Publication number 20100057425
- Publication date Mar 4, 2010
- International Business Machines Corporation
- Robert Glen Gerowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automated Method for Validating Manufacturing Test Rules Pertaining...
- Publication number 20100042396
- Publication date Feb 18, 2010
- International Business Machines Corporation
- Carisa Anne Cassani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCANNED MEMORY TESTING OF MULTI-PORT MEMORY ARRAYS
- Publication number 20090116323
- Publication date May 7, 2009
- International Business Machines Corporation
- Robert Glen Gerowitz
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLEXOR WITH LEAKAGE POWER REGULATOR
- Publication number 20090085609
- Publication date Apr 2, 2009
- International Business Machines Corporation
- Zhibin Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM FOR LOW-POWER LEVEL-SENSITIVE SCAN DESIGN LATCH W...
- Publication number 20080164912
- Publication date Jul 10, 2008
- Zhibin Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Scanned memory testing of multi-port memory arrays
- Publication number 20070086253
- Publication date Apr 19, 2007
- Robert Glen Gerowitz
- G11 - INFORMATION STORAGE
Information Patent Application
Method and process for manufacturing test generation
- Publication number 20060075315
- Publication date Apr 6, 2006
- R. Thomas Cruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH IN SITU CIRCUIT ARRANGEMENT FOR TESTING INT...
- Publication number 20020030505
- Publication date Mar 14, 2002
- JEFFREY PAUL BOETTLER
- G01 - MEASURING TESTING

Robert Glen Gerowitz

Person

Patents Grantslast 30 patents

Testing integrated circuit designs containing multiple phase rotators

Testing integrated circuit designs containing multiple phase rotators

Testing integrated circuit designs containing multiple phase rotators

Testing integrated circuit designs containing multiple phase rotators

Validating manufacturing test rules pertaining to an electronic com...

Indeterminate state logic insertion

Automatically creating manufacturing test rules pertaining to an el...

Scanned memory testing of multi-port memory arrays

Multiplexor with leakage power regulator

Method and system for low-power level-sensitive scan design latch w...

Scanned memory testing of multi-port memory arrays

Method and apparatus for manufacturing test generation

Scan chain connectivity

Hardware design language generation for input/output logic level

Integrated circuit with in situ circuit arrangement for testing int...

High speed parallel/serial link for data communication

Patents Applicationslast 30 patents

TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS

TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS

TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS

TESTING INTEGRATED CIRCUIT DESIGNS CONTAINING MULTIPLE PHASE ROTATORS

Indeterminate State Logic Insertion

AUTOMATICALLY CREATING MANUFACTURING TEST RULES PERTAINING TO AN EL...

Automated Method for Validating Manufacturing Test Rules Pertaining...

SCANNED MEMORY TESTING OF MULTI-PORT MEMORY ARRAYS

MULTIPLEXOR WITH LEAKAGE POWER REGULATOR

METHOD AND SYSTEM FOR LOW-POWER LEVEL-SENSITIVE SCAN DESIGN LATCH W...

Scanned memory testing of multi-port memory arrays

Method and process for manufacturing test generation

INTEGRATED CIRCUIT WITH IN SITU CIRCUIT ARRANGEMENT FOR TESTING INT...