Robert J. Lutz

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Chippewa Falls, WI, US

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Patents Grantslast 30 patents

Information Patent Grant
Transistor level verilog
- Patent number 7,587,305
- Issue date Sep 8, 2009
- Cray Inc.
- Robert J. Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boolean gate definition
- Patent number 6,789,249
- Issue date Sep 7, 2004
- Cray, Inc.
- Robert J. Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for adjusting the power supply voltage provide...
- Patent number 5,694,028
- Issue date Dec 2, 1997
- Cray Research, Inc.
- Richard B. Salmonson
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
PARASITIC IMPEDANCE ESTIMATION IN CIRCUIT LAYOUT
- Publication number 20080016478
- Publication date Jan 17, 2008
- Cray Inc.
- Robert J. Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Boolean gate definition
- Publication number 20040003367
- Publication date Jan 1, 2004
- Cray Inc.
- Robert J. Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transistor level verilog
- Publication number 20040002846
- Publication date Jan 1, 2004
- Cray Inc.
- Robert J. Lutz
- G06 - COMPUTING CALCULATING COUNTING