Robert J. Patterson

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Beaverton, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Process for filling submicron spaces with dielectric
- Patent number 5,270,264
- Issue date Dec 14, 1993
- Intel Corporation
- Ebrahim Andideh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for planarizing a dielectric formed over a semiconductor...
- Patent number 5,127,196
- Issue date Jul 7, 1992
- Intel Corporation
- Seiichi Morimoto
- B24 - GRINDING POLISHING
Information Patent Grant
Method of planarizing a dielectric formed over a semiconductor subs...
- Patent number 5,104,828
- Issue date Apr 14, 1992
- Intel Corporation
- Seiichi Morimoto
- B24 - GRINDING POLISHING