Robert J. WENZEL

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device with directing structure and method therefor
- Patent number 11,876,059
- Issue date Jan 16, 2024
- NXP USA, INC.
- Robert Joseph Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and devices with enhanced grounding and shielding for wire...
- Patent number 10,256,193
- Issue date Apr 9, 2019
- NXP USA, INC.
- James S. Golab
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package to board interconnect structure with built-in reference pla...
- Patent number 9,974,174
- Issue date May 15, 2018
- NXP USA, INC.
- Robert Wenzel
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Substrate with routing
- Patent number 9,748,168
- Issue date Aug 29, 2017
- NXP USA, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged integrated circuit using wire bonds
- Patent number 8,912,667
- Issue date Dec 16, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit device with at least partial packaging and method for forming
- Patent number 8,072,062
- Issue date Dec 6, 2011
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for a semiconductor device package with impro...
- Patent number 7,892,882
- Issue date Feb 22, 2011
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die with die pad pattern
- Patent number 7,834,466
- Issue date Nov 16, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit module with integrated passive device
- Patent number 7,763,976
- Issue date Jul 27, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die positioning for packaged integrated circuits
- Patent number 7,674,656
- Issue date Mar 9, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of packaging semiconductor devices
- Patent number 7,632,715
- Issue date Dec 15, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Kevin J. Hess
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with a protected active die region and method...
- Patent number 7,579,219
- Issue date Aug 25, 2009
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming crack arrest features in embedded device build-up...
- Patent number 7,553,753
- Issue date Jun 30, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Jie-Hua Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fine pitch interconnect and method of making
- Patent number 7,528,069
- Issue date May 5, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for thermal management in a multi-layer embed...
- Patent number 7,405,102
- Issue date Jul 29, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Tien Yu T. Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuit device with at least partial packaging and method for forming
- Patent number 7,361,987
- Issue date Apr 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit device with at least partial packaging, exposed active surf...
- Patent number 6,921,975
- Issue date Jul 26, 2005
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit device with at least partial packaging and method for forming
- Patent number 6,838,776
- Issue date Jan 4, 2005
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having optimized wire bond positioning
- Patent number 6,812,580
- Issue date Nov 2, 2004
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ANTENNA PACKAGE
- Publication number 20240347928
- Publication date Oct 17, 2024
- NXP B.V.
- Mustafa Acar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER WITH INTEGRATIVE PASSIVE COMPONENTS
- Publication number 20240203911
- Publication date Jun 20, 2024
- NXP USA, Inc.
- Zhiwei Gong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH DIRECTING STRUCTURE AND METHOD THEREFOR
- Publication number 20220367389
- Publication date Nov 17, 2022
- NXP USA, Inc.
- Robert Joseph Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE TO BOARD INTERCONNECT STRUCTURE WITH BUILT-IN REFERENCE PLA...
- Publication number 20180116050
- Publication date Apr 26, 2018
- FREESCALE SEMICONDUCTOR, INC.
- Robert WENZEL
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SUBSTRATE WITH ROUTING
- Publication number 20170125336
- Publication date May 4, 2017
- FREESCALE SEMICONDUCTOR, INC.
- Robert J. WENZEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED INTEGRATED CIRCUIT USING WIRE BONDS
- Publication number 20130193589
- Publication date Aug 1, 2013
- ROBERT J. WENZEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT MODULE WITH INTEGRATED PASSIVE DEVICE
- Publication number 20100078760
- Publication date Apr 1, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Jinbang Tang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE WITH DIE PAD PATTERN
- Publication number 20090152718
- Publication date Jun 18, 2009
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20080164593
- Publication date Jul 10, 2008
- Kevin J. Hess
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING AND METHOD FOR FORMING
- Publication number 20080142960
- Publication date Jun 19, 2008
- FREESCALE SEMICONDUCTOR, INC.
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS
- Publication number 20080138938
- Publication date Jun 12, 2008
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CRACK ARREST FEATURES IN EMBEDDED DEVICE BUILD-UP...
- Publication number 20080057696
- Publication date Mar 6, 2008
- Jie-Hua Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and apparatus for a semiconductor device package with impro...
- Publication number 20070284704
- Publication date Dec 13, 2007
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and apparatus for thermal management in a multi-layer embed...
- Publication number 20070284711
- Publication date Dec 13, 2007
- Tien Yu T. Lee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Perforated embedded plane package and method
- Publication number 20070212813
- Publication date Sep 13, 2007
- Owen R. Fay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fine pitch interconnect and method of making
- Publication number 20070102828
- Publication date May 10, 2007
- Robert J. Wenzel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with a protected active die region and method...
- Publication number 20060192301
- Publication date Aug 31, 2006
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit device with at least partial packaging and method for forming
- Publication number 20060012036
- Publication date Jan 19, 2006
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with a protected active die region and method...
- Publication number 20050242425
- Publication date Nov 3, 2005
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit device with at least partial packaging and method for forming
- Publication number 20040207077
- Publication date Oct 21, 2004
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit device with at least partial packaging and method for forming
- Publication number 20040207068
- Publication date Oct 21, 2004
- George R. Leal
- H01 - BASIC ELECTRIC ELEMENTS

Robert J. WENZEL

Person

Patents Grantslast 30 patents

Semiconductor device with directing structure and method therefor

Methods and devices with enhanced grounding and shielding for wire...

Package to board interconnect structure with built-in reference pla...

Substrate with routing

Packaged integrated circuit using wire bonds

Circuit device with at least partial packaging and method for forming

Methods and apparatus for a semiconductor device package with impro...

Semiconductor die with die pad pattern

Integrated circuit module with integrated passive device

Die positioning for packaged integrated circuits

Method of packaging semiconductor devices

Semiconductor device with a protected active die region and method...

Method of forming crack arrest features in embedded device build-up...

Fine pitch interconnect and method of making

Methods and apparatus for thermal management in a multi-layer embed...

Circuit device with at least partial packaging and method for forming

Circuit device with at least partial packaging, exposed active surf...

Circuit device with at least partial packaging and method for forming

Semiconductor package having optimized wire bond positioning

Patents Applicationslast 30 patents

ANTENNA PACKAGE

INTERPOSER WITH INTEGRATIVE PASSIVE COMPONENTS

SEMICONDUCTOR DEVICE WITH DIRECTING STRUCTURE AND METHOD THEREFOR

PACKAGE TO BOARD INTERCONNECT STRUCTURE WITH BUILT-IN REFERENCE PLA...

SUBSTRATE WITH ROUTING

PACKAGED INTEGRATED CIRCUIT USING WIRE BONDS

INTEGRATED CIRCUIT MODULE WITH INTEGRATED PASSIVE DEVICE

STRUCTURE WITH DIE PAD PATTERN

METHOD OF PACKAGING SEMICONDUCTOR DEVICES

CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING AND METHOD FOR FORMING

DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS

METHOD OF FORMING CRACK ARREST FEATURES IN EMBEDDED DEVICE BUILD-UP...

Methods and apparatus for a semiconductor device package with impro...

Methods and apparatus for thermal management in a multi-layer embed...

Perforated embedded plane package and method

Fine pitch interconnect and method of making

Semiconductor device with a protected active die region and method...

Circuit device with at least partial packaging and method for forming

Semiconductor device with a protected active die region and method...

Circuit device with at least partial packaging and method for forming

Circuit device with at least partial packaging and method for forming