Robert Lee Ayers

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Manassas, VA, US

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Patents Grantslast 30 patents

Information Patent Grant
Robust power plane configuration in printed circuit boards
- Patent number 8,576,578
- Issue date Nov 5, 2013
- International Business Machines Corporation
- Robert L. Ayers
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Technique for preventing forward biased epi-isolation degradation
- Patent number 4,113,512
- Issue date Sep 12, 1978
- International Business Machines Corporation
- Robert Lee Ayers
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ROBUST POWER PLANE CONFIGURATION IN PRINTED CIRCUIT BOARDS
- Publication number 20120327583
- Publication date Dec 27, 2012
- International Business Machines Corporation
- Robert L. Ayers
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR