Robert M. Bartel

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reconfigurable and scalable hardware management architecture
- Patent number 10,754,401
- Issue date Aug 25, 2020
- Lattice Semiconductor Corporation
- Srirama Chandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable and scalable hardware management architecture
- Patent number 10,296,061
- Issue date May 21, 2019
- Lattice Semiconductor Corporation
- Srirama Chandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serdes interface architecture for multi-processor systems
- Patent number 9,910,818
- Issue date Mar 6, 2018
- Lattice Semiconductor Corporation
- Stephen O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with pin for setting digital address
- Patent number 8,786,482
- Issue date Jul 22, 2014
- Lattice Semiconductor Corporation
- Robert Bartel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock delay and skew control systems and methods
- Patent number 8,255,733
- Issue date Aug 28, 2012
- Lattice Semiconductor Corporation
- Robert M. Bartel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Channel-to-channel deskew systems and methods
- Patent number 8,132,040
- Issue date Mar 6, 2012
- Lattice Semiconductor Corporation
- Robert Bartel
- G01 - MEASURING TESTING
Information Patent Grant
Oscillator tuning for phase-locked loop circuit
- Patent number 7,969,248
- Issue date Jun 28, 2011
- Lattice Semiconductor Corporation
- Trent Whitten
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock systems and methods
- Patent number 7,663,419
- Issue date Feb 16, 2010
- Lattice Semiconductor Corporation
- Kent R. Callahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock systems and methods
- Patent number 7,456,672
- Issue date Nov 25, 2008
- Lattice Semiconductor Corporation
- Kent R. Callahan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output stages for high current low noise bandgap reference circuit...
- Patent number 7,019,584
- Issue date Mar 28, 2006
- Lattice Semiconductor Corporation
- Robert M. Bartel
- G05 - CONTROLLING REGULATING
Information Patent Grant
Linear thermoelectric device driver
- Patent number 6,981,381
- Issue date Jan 3, 2006
- Lattice Semiconductor Corp.
- Ching Wang
- F25 - REFRIGERATION OR COOLING COMBINED HEATING AND REFRIGERATION SYSTEMS HEA...

Patents Applicationslast 30 patents

Information Patent Application
RECONFIGURABLE AND SCALABLE HARDWARE MANAGEMENT ARCHITECTURE
- Publication number 20190272010
- Publication date Sep 5, 2019
- Lattice Semiconductor Corporation
- Srirama Chandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable and Scalable Hardware Management Architecture
- Publication number 20160179071
- Publication date Jun 23, 2016
- Lattice Semiconductor Corporation
- Srirama Chandra
- G05 - CONTROLLING REGULATING
Information Patent Application
Serdes Interface Architecture for Multi-Processor Systems
- Publication number 20150095534
- Publication date Apr 2, 2015
- Lattice Semiconductor Corporation
- Stephen O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Output stages for high current low noise bandgap reference circuit...
- Publication number 20050168270
- Publication date Aug 4, 2005
- Robert M. Bartel
- G05 - CONTROLLING REGULATING

Robert M. Bartel

Person

Patents Grantslast 30 patents

Reconfigurable and scalable hardware management architecture

Reconfigurable and scalable hardware management architecture

Serdes interface architecture for multi-processor systems

Integrated circuit with pin for setting digital address

Clock delay and skew control systems and methods

Channel-to-channel deskew systems and methods

Oscillator tuning for phase-locked loop circuit

Clock systems and methods

Clock systems and methods

Output stages for high current low noise bandgap reference circuit...

Linear thermoelectric device driver

Patents Applicationslast 30 patents

RECONFIGURABLE AND SCALABLE HARDWARE MANAGEMENT ARCHITECTURE

Reconfigurable and Scalable Hardware Management Architecture

Serdes Interface Architecture for Multi-Processor Systems

Output stages for high current low noise bandgap reference circuit...