Robert MATEESCU

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computational resource allocation in ensemble machine learning systems
- Patent number 11,487,580
- Issue date Nov 1, 2022
- Western Digital Technologies, Inc.
- Yongjune Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data recovery and regeneration using parity code
- Patent number 10,379,952
- Issue date Aug 13, 2019
- Western Digital Technologies, Inc.
- Robert Eugeniu Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell-level realization of burn after reading for NAND flash
- Patent number 10,373,528
- Issue date Aug 6, 2019
- Western Digital Technologies, Inc.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data mapping enabling fast read multi-level 3D NAND to improve life...
- Patent number 10,360,973
- Issue date Jul 23, 2019
- Western Digital Technologies, Inc.
- Zvonimir Z. Bandic
- G11 - INFORMATION STORAGE
Information Patent Grant
Update efficient consensus protocols for erasure coded data stores
- Patent number 10,289,489
- Issue date May 14, 2019
- Western Digital Technologies, Inc.
- Arman Fazeli Chaghooshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and methodology for low latency error management within a sh...
- Patent number 10,254,982
- Issue date Apr 9, 2019
- Western Digital Technologies, Inc.
- Luiz M. Franca-Neto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling in non-volatile storage
- Patent number 10,228,878
- Issue date Mar 12, 2019
- Western Digital Technologies, Inc.
- Robert Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bad page and bad block management in memory
- Patent number 10,223,018
- Issue date Mar 5, 2019
- SanDisk Technologies LLC
- Kiran Gunnam
- G11 - INFORMATION STORAGE
Information Patent Grant
Cache oblivious algorithm for butterfly code
- Patent number 10,164,655
- Issue date Dec 25, 2018
- Western Digital Technologies, Inc.
- Cyril Guyot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed data storage with reduced storage overhead using reduce...
- Patent number 10,146,618
- Issue date Dec 4, 2018
- Western Digital Technologies, Inc.
- Lluis Pamies-Juarez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storing parity data separate from protected data
- Patent number 10,133,625
- Issue date Nov 20, 2018
- Western Digital Technologies, Inc.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage cluster and method that efficiently store small objects wit...
- Patent number 10,120,576
- Issue date Nov 6, 2018
- Western Digital Technologies, Inc.
- Adam Manzanares
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error location pointers for non volatile memory
- Patent number 10,025,652
- Issue date Jul 17, 2018
- Western Digital Technologies, Inc.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction for non-volatile memory
- Patent number 9,959,166
- Issue date May 1, 2018
- Western Digital Technologies, Inc.
- Robert Mateescu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Joint decoding of rewriting NVM error sectors
- Patent number 9,836,350
- Issue date Dec 5, 2017
- Western Digital Technologies, Inc.
- Zvonimir Z. Bandic
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Encoding scheme for 3D vertical flash memory
- Patent number 9,830,219
- Issue date Nov 28, 2017
- Western Digital Technologies, Inc.
- Robert Mateescu
- G11 - INFORMATION STORAGE
Information Patent Grant
Repair-optimal parity code
- Patent number 9,793,922
- Issue date Oct 17, 2017
- HGST Netherlands B.V.
- Robert Mateescu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Doorless protocol having multiple queue read requests in flight
- Patent number 9,778,859
- Issue date Oct 3, 2017
- Western Digital Technologies, Inc.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing enhanced performance with read before write to phase c...
- Patent number 9,754,682
- Issue date Sep 5, 2017
- Western Digital Technologies, Inc.
- Robert Eugeniu Mateescu
- G11 - INFORMATION STORAGE
Information Patent Grant
Inter-cell interference reduction in flash memory devices
- Patent number 9,704,594
- Issue date Jul 11, 2017
- Western Digital Technolgies, Inc.
- Minghai Qin
- G11 - INFORMATION STORAGE
Information Patent Grant
Doorbell-less protocol for solid state drive interface
- Patent number 9,652,199
- Issue date May 16, 2017
- Western Digital Technologies, Inc.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction for non-volatile memory
- Patent number 9,619,320
- Issue date Apr 11, 2017
- Western Digital Technologies, Inc.
- Robert Mateescu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
ACK-less protocol for noticing completion of read requests
- Patent number 9,547,472
- Issue date Jan 17, 2017
- HGST Netherlands B.V.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Acknowledgement-less protocol for solid state drive interface
- Patent number 9,535,870
- Issue date Jan 3, 2017
- HGST Netherlands B.V.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Doorbell-less endpoint-initiated protocol for storage devices
- Patent number 9,513,869
- Issue date Dec 6, 2016
- HGST Netherlands B.V.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing enhanced performance with read before write to phase c...
- Patent number 9,471,227
- Issue date Oct 18, 2016
- Western Digital Technologies, Inc.
- Cyril Guyot
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoding and decoding data to accommodate memory cells having stuck...
- Patent number 9,274,884
- Issue date Mar 1, 2016
- HGST Netherlands B.V.
- Robert Eugeniu Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing enhanced data read for multi-level cell (MLC) memory u...
- Patent number 9,208,871
- Issue date Dec 8, 2015
- HGST Netherlands B.V.
- Zvonimir Z. Bandic
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoding and decoding redundant bits to accommodate memory cells ha...
- Patent number 9,070,483
- Issue date Jun 30, 2015
- HGST Netherlands B.V.
- Robert Eugeniu Mateescu
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for storing data in stuck and unstable memory cells
- Patent number 8,996,955
- Issue date Mar 31, 2015
- HGST Netherlands B.V.
- Luiz Franca-Neto
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PRIVACY-PRESERVING DISTRIBUTED COMPUTING
- Publication number 20240146700
- Publication date May 2, 2024
- Western Digital Technologies, Inc.
- Dongwoo Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMPUTATIONAL RESOURCE ALLOCATION IN ENSEMBLE MACHINE LEARNING SYSTEMS
- Publication number 20210073036
- Publication date Mar 11, 2021
- Western Digital Technologies, Inc.
- Yongjune Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Update Efficient Consensus Protocols for Erasure Coded Data Stores
- Publication number 20190018734
- Publication date Jan 17, 2019
- Western Digital Technologies, Inc.
- Arman Fazeli Chaghooshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Recovery and Regeneration Using Parity Code
- Publication number 20180365107
- Publication date Dec 20, 2018
- Western Digital Technologies, Inc.
- Robert Eugeniu Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bad Page And Bad Block Management In Memory
- Publication number 20180307431
- Publication date Oct 25, 2018
- SanDisk Technologies LLC
- Kiran Gunnam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MAPPING ENABLING FAST READ MULTI-LEVEL 3D NAND TO IMPROVE LIFE...
- Publication number 20180182453
- Publication date Jun 28, 2018
- Western Digital Technologies, Inc.
- Zvonimir Z. BANDIC
- G11 - INFORMATION STORAGE
Information Patent Application
CELL-LEVEL REALIZATION OF BURN AFTER READING FOR NAND FLASH
- Publication number 20180165993
- Publication date Jun 14, 2018
- Western Digital Technologies, Inc.
- Zvonimir Z. BANDIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHODOLOGY FOR LOW LATENCY ERROR MANAGEMENT WITHIN A SH...
- Publication number 20180129434
- Publication date May 10, 2018
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Luiz M. Franca-Neto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Repair-Optimal Parity Code
- Publication number 20180034475
- Publication date Feb 1, 2018
- Western Digital Technologies, Inc.
- Robert Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METADATA MANAGEMENT ON A STORAGE DEVICE
- Publication number 20180024751
- Publication date Jan 25, 2018
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE CLUSTER AND METHOD THAT EFFICIENTLY STORE SMALL OBJECTS WIT...
- Publication number 20170262187
- Publication date Sep 14, 2017
- HGST NETHERLANDS B.V.
- Adam MANZANARES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION FOR NON-VOLATILE MEMORY
- Publication number 20170192846
- Publication date Jul 6, 2017
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Robert MATEESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED DATA STORAGE WITH REDUCED STORAGE OVERHEAD USING REDUCE...
- Publication number 20170192848
- Publication date Jul 6, 2017
- HGST NETHERLANDS B.V.
- Lluis PAMIES-JUAREZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SENDING DATA FROM NON-VOLATILE SOLID STATE...
- Publication number 20170141878
- Publication date May 18, 2017
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Dejan VUCINIC
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ERROR LOCATION POINTERS FOR NVM
- Publication number 20170116060
- Publication date Apr 27, 2017
- HGST NETHERLANDS B.V.
- Zvonimir Z. BANDIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Oblivious Algorithm for Butterfly Code
- Publication number 20170093426
- Publication date Mar 30, 2017
- HGST NETHERLANDS B.V.
- Cyril Guyot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JOINT DECODING OF REWRITING NVM ERROR SECTORS
- Publication number 20170091024
- Publication date Mar 30, 2017
- HGST NETHERLANDS B.V.
- Zvonimir Z. BANDIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Repair-Optimal Parity Code
- Publication number 20170093425
- Publication date Mar 30, 2017
- HGST NETHERLANDS B.V.
- Robert Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORING PARITY DATA SEPARATE FROM PROTECTED DATA
- Publication number 20170046221
- Publication date Feb 16, 2017
- HGST NETHERLANDS B.V.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDIRECTION DATA STRUCTURES IMPLEMENTED AS RECONFIGURABLE HARDWARE
- Publication number 20160246712
- Publication date Aug 25, 2016
- HGST NETHERLANDS B.V.
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION FOR NON-VOLATILE MEMORY
- Publication number 20160246670
- Publication date Aug 25, 2016
- HGST NETHERLANDS B.V.
- Robert MATEESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING ENHANCED PHASE CHANGE MEMORY (PCM) READ LATENCY THROUG...
- Publication number 20160098211
- Publication date Apr 7, 2016
- HGST NETHERLANDS B.V.
- Zvonimir Z. Bandic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENCODING SCHEME FOR 3D VERTICAL FLASH MEMORY
- Publication number 20160077912
- Publication date Mar 17, 2016
- HGST NETHERLANDS B.V.
- Robert MATEESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE WITH READ BEFORE WRITE TO PHASE C...
- Publication number 20160018988
- Publication date Jan 21, 2016
- HGST NETHERLANDS B.V.
- Cyril Guyot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOORLESS PROTOCOL HAVING MULTIPLE QUEUE READ REQUESTS IN FLIGHT
- Publication number 20150177994
- Publication date Jun 25, 2015
- HGST NETHERLANDS B.V.
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE WITH READ BEFORE WRITE TO PHASE C...
- Publication number 20150143187
- Publication date May 21, 2015
- HGST NETHERLANDS B.V.
- Robert Eugeniu Mateescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACK-LESS PROTOCOL FOR NOTICING COMPLETION OF READ REQUESTS
- Publication number 20150081933
- Publication date Mar 19, 2015
- STEC, Inc.
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACKNOWLEDGEMENT-LESS PROTOCOL FOR SOLID STATE DRIVE INTERFACE
- Publication number 20150081955
- Publication date Mar 19, 2015
- HGST
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOORBELL-LESS ENDPOINT-INITIATED PROTOCOL FOR STORAGE DEVICES
- Publication number 20150081947
- Publication date Mar 19, 2015
- STEC, Inc.
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOORBELL-LESS PROTOCOL FOR SOLID STATE DRIVE INTERFACE
- Publication number 20150081956
- Publication date Mar 19, 2015
- HGST
- Dejan VUCINIC
- G06 - COMPUTING CALCULATING COUNTING

Robert MATEESCU

Person

Patents Grantslast 30 patents

Computational resource allocation in ensemble machine learning systems

Data recovery and regeneration using parity code

Cell-level realization of burn after reading for NAND flash

Data mapping enabling fast read multi-level 3D NAND to improve life...

Update efficient consensus protocols for erasure coded data stores

System and methodology for low latency error management within a sh...

Wear leveling in non-volatile storage

Bad page and bad block management in memory

Cache oblivious algorithm for butterfly code

Distributed data storage with reduced storage overhead using reduce...

Storing parity data separate from protected data

Storage cluster and method that efficiently store small objects wit...

Error location pointers for non volatile memory

Error correction for non-volatile memory

Joint decoding of rewriting NVM error sectors

Encoding scheme for 3D vertical flash memory

Repair-optimal parity code

Doorless protocol having multiple queue read requests in flight

Implementing enhanced performance with read before write to phase c...

Inter-cell interference reduction in flash memory devices

Doorbell-less protocol for solid state drive interface

Error correction for non-volatile memory

ACK-less protocol for noticing completion of read requests

Acknowledgement-less protocol for solid state drive interface

Doorbell-less endpoint-initiated protocol for storage devices

Implementing enhanced performance with read before write to phase c...

Encoding and decoding data to accommodate memory cells having stuck...

Implementing enhanced data read for multi-level cell (MLC) memory u...

Encoding and decoding redundant bits to accommodate memory cells ha...

Techniques for storing data in stuck and unstable memory cells

Patents Applicationslast 30 patents

PRIVACY-PRESERVING DISTRIBUTED COMPUTING

COMPUTATIONAL RESOURCE ALLOCATION IN ENSEMBLE MACHINE LEARNING SYSTEMS

Update Efficient Consensus Protocols for Erasure Coded Data Stores

Data Recovery and Regeneration Using Parity Code

Bad Page And Bad Block Management In Memory

DATA MAPPING ENABLING FAST READ MULTI-LEVEL 3D NAND TO IMPROVE LIFE...

CELL-LEVEL REALIZATION OF BURN AFTER READING FOR NAND FLASH

SYSTEM AND METHODOLOGY FOR LOW LATENCY ERROR MANAGEMENT WITHIN A SH...

Repair-Optimal Parity Code

METADATA MANAGEMENT ON A STORAGE DEVICE

STORAGE CLUSTER AND METHOD THAT EFFICIENTLY STORE SMALL OBJECTS WIT...

ERROR CORRECTION FOR NON-VOLATILE MEMORY

DISTRIBUTED DATA STORAGE WITH REDUCED STORAGE OVERHEAD USING REDUCE...

SYSTEMS AND METHODS FOR SENDING DATA FROM NON-VOLATILE SOLID STATE...

ERROR LOCATION POINTERS FOR NVM

Cache Oblivious Algorithm for Butterfly Code

JOINT DECODING OF REWRITING NVM ERROR SECTORS

Repair-Optimal Parity Code

STORING PARITY DATA SEPARATE FROM PROTECTED DATA

INDIRECTION DATA STRUCTURES IMPLEMENTED AS RECONFIGURABLE HARDWARE

ERROR CORRECTION FOR NON-VOLATILE MEMORY

IMPLEMENTING ENHANCED PHASE CHANGE MEMORY (PCM) READ LATENCY THROUG...

ENCODING SCHEME FOR 3D VERTICAL FLASH MEMORY

IMPLEMENTING ENHANCED PERFORMANCE WITH READ BEFORE WRITE TO PHASE C...

DOORLESS PROTOCOL HAVING MULTIPLE QUEUE READ REQUESTS IN FLIGHT

IMPLEMENTING ENHANCED PERFORMANCE WITH READ BEFORE WRITE TO PHASE C...

ACK-LESS PROTOCOL FOR NOTICING COMPLETION OF READ REQUESTS

ACKNOWLEDGEMENT-LESS PROTOCOL FOR SOLID STATE DRIVE INTERFACE

DOORBELL-LESS ENDPOINT-INITIATED PROTOCOL FOR STORAGE DEVICES

DOORBELL-LESS PROTOCOL FOR SOLID STATE DRIVE INTERFACE