Robert Melcher

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Folsom, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Operation management in a memory device
- Patent number 9,465,539
- Issue date Oct 11, 2016
- Micron Technology, Inc.
- Anthony R. Cabrera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation management in a memory device
- Patent number 9,195,406
- Issue date Nov 24, 2015
- Micron Technology, Inc.
- Anthony R. Cabrera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full chip wear leveling in memory device
- Patent number 8,601,202
- Issue date Dec 3, 2013
- Micron Technology, Inc.
- Robert Melcher
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective refresh of single bit memory cells
- Patent number 7,936,610
- Issue date May 3, 2011
- Micron Technology, Inc.
- Robert Melcher
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,327,605
- Issue date Feb 5, 2008
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,177,186
- Issue date Feb 13, 2007
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,075,822
- Issue date Jul 11, 2006
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
OPERATION MANAGEMENT IN A MEMORY DEVICE
- Publication number 20160070476
- Publication date Mar 10, 2016
- Micron Technology, Inc.
- Anthony R. Cabrera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION MANAGEMENT IN A MEMORY DEVICE
- Publication number 20150006786
- Publication date Jan 1, 2015
- Micron Technology, Inc.
- Anthony R. Cabrera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH DATAPATH LOAD AND TEST OF MULTI-LEVEL MEMORY CELLS
- Publication number 20080008010
- Publication date Jan 10, 2008
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Application
High bandwidth datapath load and test of multi-level memory cells
- Publication number 20060193172
- Publication date Aug 31, 2006
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Application
High bandwidth datapath load and test of multi-level memory cells
- Publication number 20040128594
- Publication date Jul 1, 2004
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE