Robert Nuckolls

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transposing in a matrix-vector processor
- Patent number 10,922,057
- Issue date Feb 16, 2021
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transposing in a matrix-vector processor
- Patent number 10,430,163
- Issue date Oct 1, 2019
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transposing in a matrix-vector processor
- Patent number 9,952,831
- Issue date Apr 24, 2018
- Google LLC
- Jonathan Ross
- G11 - INFORMATION STORAGE
Information Patent Grant
Branch prediction structure with branch direction entries that shar...
- Patent number 7,380,110
- Issue date May 27, 2008
- Sun Microsystems, Inc.
- Robert D. Nuckolls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and a system for using same set of registers to handle both...
- Patent number 7,191,316
- Issue date Mar 13, 2007
- Sun Microsystems, Inc.
- Rabin A. Sugumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register window flattening logic for dependency checking among inst...
- Patent number 7,080,237
- Issue date Jul 18, 2006
- Sun Microsystems, Inc.
- Chandra M. R. Thimmannagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register window fill technique for retirement window having entry s...
- Patent number 7,035,999
- Issue date Apr 25, 2006
- Sun Microsystems, Inc.
- Chandra Thimmanagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register window spill technique for retirement window having entry...
- Patent number 7,024,541
- Issue date Apr 4, 2006
- Sun Microsystems, Inc.
- Chandra Thimmanagari
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TRANSPOSING IN A MATRIX-VECTOR PROCESSOR
- Publication number 20210165635
- Publication date Jun 3, 2021
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPOSING IN A MATRIX-VECTOR PROCESSOR
- Publication number 20200019380
- Publication date Jan 16, 2020
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPOSING IN A MATRIX-VECTOR PROCESSOR
- Publication number 20180232209
- Publication date Aug 16, 2018
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCEPTUAL PRODUCT RECOMMENDATION
- Publication number 20160070803
- Publication date Mar 10, 2016
- Funky Flick, Inc.
- Robert Nuckolls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to limit register file read ports in an out-of...
- Publication number 20040199749
- Publication date Oct 7, 2004
- Robert Golla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Issue bandwidth in a multi-issue out-of-order processor
- Publication number 20040181651
- Publication date Sep 16, 2004
- Rabin A. Sugumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for handling control transfer instruction couples in out-of-...
- Publication number 20040162972
- Publication date Aug 19, 2004
- Sorin Iacobovici
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for determining an early reifetch address of a...
- Publication number 20040148497
- Publication date Jul 29, 2004
- Ali Vahidsafa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for handling a mix of single precision and double precision...
- Publication number 20040148492
- Publication date Jul 29, 2004
- Rabin A. Sugumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for handling a conditional move instruction in an out of ord...
- Publication number 20040148496
- Publication date Jul 29, 2004
- Chandra Mohan Reddy Thimmannagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scheme to simplify instruction buffer logic supporting multiple str...
- Publication number 20040128476
- Publication date Jul 1, 2004
- Robert Nuckolls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Strand switching algorithm to avoid strand starvation
- Publication number 20040128488
- Publication date Jul 1, 2004
- Chandra M. R. Thimmannagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for early speculative store-load bypass
- Publication number 20040044881
- Publication date Mar 4, 2004
- Sun Microsystems, Inc.
- Robert M. Maier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register window fill technique for retirement window having entry s...
- Publication number 20030229772
- Publication date Dec 11, 2003
- Chandra Thimmanagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register window spill technique for retirement window having entry...
- Publication number 20030229771
- Publication date Dec 11, 2003
- Chandra Thimmanagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register flattening logic
- Publication number 20030221088
- Publication date Nov 27, 2003
- Chandra Thimmanagari
- G06 - COMPUTING CALCULATING COUNTING

Robert Nuckolls

Person

Patents Grantslast 30 patents

Transposing in a matrix-vector processor

Transposing in a matrix-vector processor

Transposing in a matrix-vector processor

Branch prediction structure with branch direction entries that shar...

Method and a system for using same set of registers to handle both...

Register window flattening logic for dependency checking among inst...

Register window fill technique for retirement window having entry s...

Register window spill technique for retirement window having entry...

Patents Applicationslast 30 patents

TRANSPOSING IN A MATRIX-VECTOR PROCESSOR

TRANSPOSING IN A MATRIX-VECTOR PROCESSOR

TRANSPOSING IN A MATRIX-VECTOR PROCESSOR

CONCEPTUAL PRODUCT RECOMMENDATION

Method and apparatus to limit register file read ports in an out-of...

Issue bandwidth in a multi-issue out-of-order processor

Method for handling control transfer instruction couples in out-of-...

Method and apparatus for determining an early reifetch address of a...

Method for handling a mix of single precision and double precision...

Method for handling a conditional move instruction in an out of ord...

Scheme to simplify instruction buffer logic supporting multiple str...

Strand switching algorithm to avoid strand starvation

Method and system for early speculative store-load bypass

Register window fill technique for retirement window having entry s...

Register window spill technique for retirement window having entry...

Register flattening logic