Robert Pawlowski

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, apparatus and method for user space object coherency in a p...
- Patent number 11,960,922
- Issue date Apr 16, 2024
- Intel Corporation
- Joshua B. Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,630,691
- Issue date Apr 18, 2023
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded processor core with hardware-assisted task scheduling
- Patent number 11,360,809
- Issue date Jun 14, 2022
- Intel Corporation
- William Paul Griffin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,106,494
- Issue date Aug 31, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for barrier synchronization in a multi...
- Patent number 11,061,742
- Issue date Jul 13, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array broadcast and reduction systems and methods
- Patent number 10,983,793
- Issue date Apr 20, 2021
- Intel Corporation
- Joshua Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for ISA support for indirect loads and stores f...
- Patent number 10,929,132
- Issue date Feb 23, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor system with configurable cache sub-domains and cros...
- Patent number 10,795,819
- Issue date Oct 6, 2020
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structures and operations of integrated circuits having network of...
- Patent number 10,476,492
- Issue date Nov 12, 2019
- Intel Corporation
- Ankit More
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
COMPUTING ARCHITECTURE
- Publication number 20240256283
- Publication date Aug 1, 2024
- Intel Corporation
- Joshua B. Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE AND HARDWARE SUPPORT FOR HASH OPERATIONS
- Publication number 20240241645
- Publication date Jul 18, 2024
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL EXTENSION TO GLOBAL ADDRESS SPACE AND SYSTEM SECURITY
- Publication number 20240160580
- Publication date May 16, 2024
- Intel Corporation
- Gurpreet Singh KALSI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE SUPPORT FOR AT-SPEED NEAR-MEMORY ATOMI...
- Publication number 20240119015
- Publication date Apr 11, 2024
- Intel Corporation
- Shruti Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY RECONFIGURABLE PROCESSING CORE
- Publication number 20240069921
- Publication date Feb 29, 2024
- Intel Corporation
- Scott Cline
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DIMENSIONAL NETWORK SORTED ARRAY MERGING
- Publication number 20240045829
- Publication date Feb 8, 2024
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DIMENSIONAL NETWORK SORTED ARRAY INTERSECTION
- Publication number 20240028555
- Publication date Jan 25, 2024
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE SUPPORT FOR DATA TYPE CONVERSION IN NE...
- Publication number 20240020253
- Publication date Jan 18, 2024
- Intel Corporation
- Shruti Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE SUPPORT FOR CONDITIONAL DIRECT MEMORY...
- Publication number 20230333998
- Publication date Oct 19, 2023
- Intel Corporation
- Shruti Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY TO SUPPORT BITMAP MANIPULATION OPERATIONS USING A DIRECT...
- Publication number 20230315451
- Publication date Oct 5, 2023
- Intel Corporation
- Shruti Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RETURN VALUE STORAGE FOR ATOMIC FUNCTIONS
- Publication number 20230095207
- Publication date Mar 30, 2023
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SUPPORT FOR INDIRECT LOADS AND INDIRECT STORES IN GRAPH APPLI...
- Publication number 20220413855
- Publication date Dec 29, 2022
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITRY AND METHODS FOR DIRECT MEMORY ACCESS INSTRUCTION SET ARCH...
- Publication number 20220414038
- Publication date Dec 29, 2022
- Intel Corporation
- ROBERT PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY AND HIGHLY PROGRAMMABLE INTERRUPT CONTROLLER UNIT
- Publication number 20220229795
- Publication date Jul 21, 2022
- Scott N. Cline
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE WITH PROGRAMMABLE DIRECT MEMORY ACCESS...
- Publication number 20220222075
- Publication date Jul 14, 2022
- Robert S. Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LARGE-SCALE MATRIX RESTRUCTURING AND MATRIX-SCALAR OPERATIONS
- Publication number 20220100508
- Publication date Mar 31, 2022
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR USER SPACE OBJECT COHERENCY IN A P...
- Publication number 20220091987
- Publication date Mar 24, 2022
- Intel Corporation
- JOSHUA B. FRYMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-NETWORK MULTICAST OPERATIONS
- Publication number 20210409265
- Publication date Dec 30, 2021
- Intel Corporation
- Robert PAWLOWSKI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20210389984
- Publication date Dec 16, 2021
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR ACCELERATION OF A PREFIX-SCAN OPERATION
- Publication number 20210149683
- Publication date May 20, 2021
- Intel Corporation
- Ankit MORE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE SUPPORT FOR DUAL-MEMORY ATOMIC OPERATIONS
- Publication number 20200401412
- Publication date Dec 24, 2020
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARRAY BROADCAST AND REDUCTION SYSTEMS AND METHODS
- Publication number 20200310795
- Publication date Oct 1, 2020
- Intel Corporation
- Joshua Fryman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20200104164
- Publication date Apr 2, 2020
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR BARRIER SYNCHRONIZATION IN A MULTI...
- Publication number 20200004602
- Publication date Jan 2, 2020
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTITHREADED PROCESSOR CORE WITH HARDWARE-ASSISTED TASK SCHEDULING
- Publication number 20200004587
- Publication date Jan 2, 2020
- Intel Corporation
- Paul Griffin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE TO FACILITATE ENERGY-EFFICIENT COMPUTI...
- Publication number 20190303159
- Publication date Oct 3, 2019
- Intel Corporation
- Joshua B. FRYMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURES AND OPERATIONS OF INTEGRATED CIRCUITS HAVING NETWORK OF...
- Publication number 20190109590
- Publication date Apr 11, 2019
- Intel Corporation
- Ankit More
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZED MEMORY ACCESS BANDWIDTH DEVICES, SYSTEMS, AND METHODS FOR...
- Publication number 20180285252
- Publication date Oct 4, 2018
- Intel Corporation
- Kon-Woo Kwon
- G06 - COMPUTING CALCULATING COUNTING

Robert Pawlowski

Person

Patents Grantslast 30 patents

System, apparatus and method for user space object coherency in a p...

Memory system architecture for multi-threaded processors

Multithreaded processor core with hardware-assisted task scheduling

Memory system architecture for multi-threaded processors

System, apparatus and method for barrier synchronization in a multi...

Array broadcast and reduction systems and methods

Systems and methods for ISA support for indirect loads and stores f...

Multi-processor system with configurable cache sub-domains and cros...

Structures and operations of integrated circuits having network of...

Patents Applicationslast 30 patents

COMPUTING ARCHITECTURE

INSTRUCTION SET ARCHITECTURE AND HARDWARE SUPPORT FOR HASH OPERATIONS

VIRTUAL EXTENSION TO GLOBAL ADDRESS SPACE AND SYSTEM SECURITY

INSTRUCTION SET ARCHITECTURE SUPPORT FOR AT-SPEED NEAR-MEMORY ATOMI...

DYNAMICALLY RECONFIGURABLE PROCESSING CORE

MULTI-DIMENSIONAL NETWORK SORTED ARRAY MERGING

MULTI-DIMENSIONAL NETWORK SORTED ARRAY INTERSECTION

INSTRUCTION SET ARCHITECTURE SUPPORT FOR DATA TYPE CONVERSION IN NE...

INSTRUCTION SET ARCHITECTURE SUPPORT FOR CONDITIONAL DIRECT MEMORY...

TECHNOLOGY TO SUPPORT BITMAP MANIPULATION OPERATIONS USING A DIRECT...

RETURN VALUE STORAGE FOR ATOMIC FUNCTIONS

CACHE SUPPORT FOR INDIRECT LOADS AND INDIRECT STORES IN GRAPH APPLI...

CIRCUITRY AND METHODS FOR DIRECT MEMORY ACCESS INSTRUCTION SET ARCH...

LOW LATENCY AND HIGHLY PROGRAMMABLE INTERRUPT CONTROLLER UNIT

INSTRUCTION SET ARCHITECTURE WITH PROGRAMMABLE DIRECT MEMORY ACCESS...

LARGE-SCALE MATRIX RESTRUCTURING AND MATRIX-SCALAR OPERATIONS

SYSTEM, APPARATUS AND METHOD FOR USER SPACE OBJECT COHERENCY IN A P...

IN-NETWORK MULTICAST OPERATIONS

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

TECHNIQUES FOR ACCELERATION OF A PREFIX-SCAN OPERATION

HARDWARE SUPPORT FOR DUAL-MEMORY ATOMIC OPERATIONS

ARRAY BROADCAST AND REDUCTION SYSTEMS AND METHODS

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

SYSTEM, APPARATUS AND METHOD FOR BARRIER SYNCHRONIZATION IN A MULTI...

MULTITHREADED PROCESSOR CORE WITH HARDWARE-ASSISTED TASK SCHEDULING

INSTRUCTION SET ARCHITECTURE TO FACILITATE ENERGY-EFFICIENT COMPUTI...

STRUCTURES AND OPERATIONS OF INTEGRATED CIRCUITS HAVING NETWORK OF...

OPTIMIZED MEMORY ACCESS BANDWIDTH DEVICES, SYSTEMS, AND METHODS FOR...