Robert Russell Williams

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and remote answering machine controller for programmable con...
- Patent number 6,940,955
- Issue date Sep 6, 2005
- International Business Machines Corporation
- Steven Paul Jones
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for testing, characterizing and tuning a chip...
- Patent number 6,735,543
- Issue date May 11, 2004
- International Business Machines Corporation
- Steven Michael Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Method and insulin pump for providing a forgotten bolus warning
- Patent number 6,650,951
- Issue date Nov 18, 2003
- International Business Machines Corporation
- Steven Paul Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically producing an effective impedance of an output driver wi...
- Patent number 6,600,347
- Issue date Jul 29, 2003
- International Business Machines Corporation
- John Michael Borkenhagen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mixed voltage output driver with automatic impedance adjustment
- Patent number 6,239,617
- Issue date May 29, 2001
- International Business Machines Corporation
- David LeRoy Guertin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Active clamp network for multiple voltages
- Patent number 6,229,372
- Issue date May 8, 2001
- International Business Machines Corporation
- Benjamin William Mashak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Assisted gunning transceiver logic (AGTL) bus driver
- Patent number 6,222,389
- Issue date Apr 24, 2001
- International Business Machines Corporation
- Robert Russell Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for implementing adjustable logic threshold in...
- Patent number 6,163,173
- Issue date Dec 19, 2000
- International Business Machines Corporation
- Salvatore N. Storino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for body control in silicon-on-insulator (SOI)...
- Patent number 6,150,869
- Issue date Nov 21, 2000
- International Business Machines Corporation
- Salvatore N. Storino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of testing susceptibility to failure of functional circuitry...
- Patent number 6,111,422
- Issue date Aug 29, 2000
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for bipolar elimination in silicon-on-insulat...
- Patent number 6,094,072
- Issue date Jul 25, 2000
- International Business Machines Corporation
- Andrew Douglas Davies
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device having embedded test device for testing design...
- Patent number 6,049,218
- Issue date Apr 11, 2000
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Driver circuit for providing reduced AC defects
- Patent number 6,043,689
- Issue date Mar 28, 2000
- International Business Machines Corporation
- John Edward Sheets
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Test device and method facilitating aggressive circuit design
- Patent number 6,005,406
- Issue date Dec 21, 1999
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Driver having inductance-controlled current slew rate
- Patent number 5,949,249
- Issue date Sep 7, 1999
- International Business Machines Corporation
- Curtis Walter Preuss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage upwardly compliant CMOS off-chip driver
- Patent number 5,804,998
- Issue date Sep 8, 1998
- International Business Machines Corporation
- Joseph James Cahill
- G11 - INFORMATION STORAGE
Information Patent Grant
Off-chip driver circuit with reduced hot-electron degradation
- Patent number 5,726,589
- Issue date Mar 10, 1998
- International Business Machines Corporation
- Joseph J. Cahill
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reducing clock skew in large-scale integrated circuits
- Patent number 5,235,521
- Issue date Aug 10, 1993
- International Business Machines Corporation
- Charles L. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing clock skew in large-scale integrated circuits
- Patent number 5,077,676
- Issue date Dec 31, 1991
- International Business Machines Corporation
- Charles L. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI performance compensation for off-chip drivers and clock genera...
- Patent number 4,939,389
- Issue date Jul 3, 1990
- International Business Machines Corporation
- Dennis T. Cox
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for testing three state drivers
- Patent number 4,841,232
- Issue date Jun 20, 1989
- International Business Machines Corporation
- Patricia K. Graham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic-circuit layout for large-scale integrated circuits
- Patent number 4,746,966
- Issue date May 24, 1988
- International Business Machines Corporation
- Joseph M. Fitzgerald
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Logic-circuit layout for large-scale integrated circuits
- Patent number 4,731,643
- Issue date Mar 15, 1988
- International Business Machines Corporation
- Bradford Dunham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of optimizing signal timing delays and power consumption in...
- Patent number 4,698,760
- Issue date Oct 6, 1987
- International Business Machines
- Robert F. Lembach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic array with enhanced flexibility
- Patent number 4,032,894
- Issue date Jun 28, 1977
- International Business Machines Corporation
- Robert Russell Williams
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for testing, characterizing and tuning a chip...
- Publication number 20030101015
- Publication date May 29, 2003
- International Business Machines Corpaoation
- Steven Michael Douskey
- G01 - MEASURING TESTING
Information Patent Application
DYNAMICALLY PRODUCING AN EFFECTIVE IMPEDANCE OF AN OUTPUT DRIVER WI...
- Publication number 20030067327
- Publication date Apr 10, 2003
- International Business Machines Corporation
- John Michael Borkenhagen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Pseudo-differential parallel source synchronous bus
- Publication number 20020152340
- Publication date Oct 17, 2002
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING

Robert Russell Williams

Person

Patents Grantslast 30 patents

Method and remote answering machine controller for programmable con...

Method and apparatus for testing, characterizing and tuning a chip...

Method and insulin pump for providing a forgotten bolus warning

Dynamically producing an effective impedance of an output driver wi...

Mixed voltage output driver with automatic impedance adjustment

Active clamp network for multiple voltages

Assisted gunning transceiver logic (AGTL) bus driver

Method and apparatus for implementing adjustable logic threshold in...

Method and apparatus for body control in silicon-on-insulator (SOI)...

Method of testing susceptibility to failure of functional circuitry...

Methods and apparatus for bipolar elimination in silicon-on-insulat...

Semiconductor device having embedded test device for testing design...

Driver circuit for providing reduced AC defects

Test device and method facilitating aggressive circuit design

Driver having inductance-controlled current slew rate

Voltage upwardly compliant CMOS off-chip driver

Off-chip driver circuit with reduced hot-electron degradation

Reducing clock skew in large-scale integrated circuits

Reducing clock skew in large-scale integrated circuits

VLSI performance compensation for off-chip drivers and clock genera...

Method and apparatus for testing three state drivers

Logic-circuit layout for large-scale integrated circuits

Logic-circuit layout for large-scale integrated circuits

Method of optimizing signal timing delays and power consumption in...

Logic array with enhanced flexibility

Patents Applicationslast 30 patents

Method and apparatus for testing, characterizing and tuning a chip...

DYNAMICALLY PRODUCING AN EFFECTIVE IMPEDANCE OF AN OUTPUT DRIVER WI...

Pseudo-differential parallel source synchronous bus