Robert Schell

Person

Chatham, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Nested feedback for offset cancellation in a wireline receiver
- Patent number 11,509,338
- Issue date Nov 22, 2022
- Analog Devices, Inc.
- John Kenney
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phasing detection of asynchronous dividers
- Patent number 11,444,746
- Issue date Sep 13, 2022
- Analog Devices, Inc.
- John Kenney
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for synchronizing and interleaving separate sampl...
- Patent number 10,177,897
- Issue date Jan 8, 2019
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer circuit optimization using coarse frequency detection
- Patent number 10,033,555
- Issue date Jul 24, 2018
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Use of logic circuit embedded into comparator for foreground offset...
- Patent number 8,836,549
- Issue date Sep 16, 2014
- Analog Devices, Inc.
- Robert Schell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for quadrature clock signal generation
- Patent number 8,760,209
- Issue date Jun 24, 2014
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and methods for invertible sine-shaping for phase interpo...
- Patent number 8,754,678
- Issue date Jun 17, 2014
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYNCHRONIZATION OF MULTIPLE CLOCK DIVIDERS BY USING LOWER-FREQUENCY...
- Publication number 20240364348
- Publication date Oct 31, 2024
- Avago Technologies International Sales Pte. Limited
- Robert C. Schell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUADRATURE DIVIDER ERROR CORRECTION
- Publication number 20240364494
- Publication date Oct 31, 2024
- Avago Technologies International Sales Pte. Limited
- Robert C. Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NESTED FEEDBACK FOR OFFSET CANCELLATION IN A WIRELINE RECEIVER
- Publication number 20210297100
- Publication date Sep 23, 2021
- Analog Devices, Inc.
- John KENNEY
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR SYNCHRONIZING AND INTERLEAVING SEPARATE SAMPL...
- Publication number 20180102895
- Publication date Apr 12, 2018
- Analog Devices, Inc.
- ROBERT SCHELL
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EQUALIZER CIRCUIT OPTIMIZATION USING COARSE FREQUENCY DETECTION
- Publication number 20180076985
- Publication date Mar 15, 2018
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR CONTINUOUS-TIME EQUALIZATION
- Publication number 20150288545
- Publication date Oct 8, 2015
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR QUADRATURE CLOCK SIGNAL GENERATION
- Publication number 20140086364
- Publication date Mar 27, 2014
- Analog Devices, Inc.
- Robert Schell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
USE OF LOGIC CIRCUIT EMBEDDED INTO COMPARATOR FOR FOREGROUND OFFSET...
- Publication number 20130154860
- Publication date Jun 20, 2013
- Analog Devices, Inc.
- Robert Schell
- H03 - BASIC ELECTRONIC CIRCUITRY

Robert Schell

Person

Patents Grantslast 30 patents

Nested feedback for offset cancellation in a wireline receiver

Phasing detection of asynchronous dividers

Method and system for synchronizing and interleaving separate sampl...

Equalizer circuit optimization using coarse frequency detection

Use of logic circuit embedded into comparator for foreground offset...

Apparatus and methods for quadrature clock signal generation

Apparatus and methods for invertible sine-shaping for phase interpo...

Patents Applicationslast 30 patents

SYNCHRONIZATION OF MULTIPLE CLOCK DIVIDERS BY USING LOWER-FREQUENCY...

QUADRATURE DIVIDER ERROR CORRECTION

NESTED FEEDBACK FOR OFFSET CANCELLATION IN A WIRELINE RECEIVER

METHOD AND SYSTEM FOR SYNCHRONIZING AND INTERLEAVING SEPARATE SAMPL...

EQUALIZER CIRCUIT OPTIMIZATION USING COARSE FREQUENCY DETECTION

APPARATUS AND METHODS FOR CONTINUOUS-TIME EQUALIZATION

APPARATUS AND METHODS FOR QUADRATURE CLOCK SIGNAL GENERATION

USE OF LOGIC CIRCUIT EMBEDDED INTO COMPARATOR FOR FOREGROUND OFFSET...