Robert Vachon

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Zebulon, NC, US

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Patents Grantslast 30 patents

Information Patent Grant
Clock gating circuit for dual-edge-triggered flip-flops
- Patent number 12,224,752
- Issue date Feb 11, 2025
- QUALCOMM Incorporated
- Yimai Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for time management and scheduling for sychron...
- Patent number 9,373,074
- Issue date Jun 21, 2016
- QUALCOMM Incorporated
- Jeffrey A. Levin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method or apparatus for combining multiple streams of media...
- Patent number 8,762,561
- Issue date Jun 24, 2014
- QUALCOMM Incorporated
- Nidish R. Kamath
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit card assembly footprint providing reworkable interconnectio...
- Patent number 5,877,942
- Issue date Mar 2, 1999
- QUALCOMM Incorporated
- Luis S. Kida
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
CLOCK GATING CIRCUIT FOR DUAL-EDGE-TRIGGERED FLIP-FLOPS
- Publication number 20250030407
- Publication date Jan 23, 2025
- QUALCOMM Incorporated
- Yimai PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR TIME MANAGEMENT AND SCHEDULING FOR SYCHRON...
- Publication number 20140101661
- Publication date Apr 10, 2014
- QUALCOMM Incorporated
- Jeffrey A. Levin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD OR APPARATUS FOR COMBINING MULTIPLE STREAMS OF MEDIA...
- Publication number 20100023637
- Publication date Jan 28, 2010
- QUALCOMM Incorporated
- Nidish R. Kamath
- H04 - ELECTRIC COMMUNICATION TECHNIQUE