Robert W. Davis

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Ft. Collins, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of parasitic extraction from a previously calculated capacit...
- Patent number 7,185,298
- Issue date Feb 27, 2007
- LSI Logic Corporation
- John D. Corbeil, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of delay calculation for variation in interconnect metal pro...
- Patent number 6,880,142
- Issue date Apr 12, 2005
- LSI Logic Corporation
- Qian Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bent gate transistor modeling
- Patent number 6,871,333
- Issue date Mar 22, 2005
- LSI Logic Corporation
- SangJune Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for indentifying causes of poor silicon-to-sim...
- Patent number 6,493,851
- Issue date Dec 10, 2002
- LSI Logic Corporation
- Randall E. Bach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method of parasitic extraction from a previously calculated capacit...
- Publication number 20060136850
- Publication date Jun 22, 2006
- LSI Logic Corporation
- John D. Corbeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of delay calculation for variation in interconnect metal pro...
- Publication number 20040078765
- Publication date Apr 22, 2004
- Qian Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bent gate transistor modeling
- Publication number 20040068704
- Publication date Apr 8, 2004
- SangJune Park
- G06 - COMPUTING CALCULATING COUNTING