Roberto Suaya

Person

Meylan, FR

People

Patents Grantslast 30 patents

Information Patent Grant
High-frequency VLSI interconnect and intentional inductor impedance...
- Patent number 9,230,054
- Issue date Jan 5, 2016
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-frequency VLSI interconnect and intentional inductor impedance...
- Patent number 8,910,108
- Issue date Dec 9, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mutual inductance extraction using dipole approximations
- Patent number 8,826,204
- Issue date Sep 2, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-frequency VLSI interconnect and intentional inductor impedance...
- Patent number 8,732,648
- Issue date May 20, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extracting high frequency impedance in a circuit design using an el...
- Patent number 8,667,446
- Issue date Mar 4, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining mutual inductance between intentional inductors
- Patent number 8,650,522
- Issue date Feb 11, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mutual inductance extraction using dipole approximations
- Patent number 8,549,449
- Issue date Oct 1, 2013
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Through-silicon via admittance extraction
- Patent number 8,504,962
- Issue date Aug 6, 2013
- Mentor Graphics Corporation
- Vasileios Kourkoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Through silicon via impedance extraction
- Patent number 8,448,115
- Issue date May 21, 2013
- Mentor Graphics Corporation
- Vasileios Kourkoulos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling the skin effect using efficient conduction mode techniques
- Patent number 8,225,266
- Issue date Jul 17, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-frequency VLSI interconnect and intentional inductor impedance...
- Patent number 8,214,788
- Issue date Jul 3, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining mutual inductance between intentional inductors
- Patent number 8,161,438
- Issue date Apr 17, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synthesis strategies based on the appropriate use of inductance eff...
- Patent number 8,091,054
- Issue date Jan 3, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling the skin effect using efficient conduction mode techniques
- Patent number 8,024,692
- Issue date Sep 20, 2011
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extracting high frequency impedance in a circuit design using an el...
- Patent number 7,689,962
- Issue date Mar 30, 2010
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mutual inductance extraction using dipole approximations
- Patent number 7,496,871
- Issue date Feb 24, 2009
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extracting high frequency impedance in a circuit design using broad...
- Patent number 7,454,300
- Issue date Nov 18, 2008
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synthesis strategies based on the appropriate use of inductance eff...
- Patent number 7,426,706
- Issue date Sep 16, 2008
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Capacitance measurements for an integrated circuit
- Patent number 7,260,796
- Issue date Aug 21, 2007
- Roberto Suaya
- G01 - MEASURING TESTING
Information Patent Grant
Capacitance and transmission line measurements for an integrated ci...
- Patent number 7,099,808
- Issue date Aug 29, 2006
- Mentor Graphics Corp.
- Roberto Suaya
- G01 - MEASURING TESTING
Information Patent Grant
Synthesis strategies based on the appropriate use of inductance eff...
- Patent number 7,013,442
- Issue date Mar 14, 2006
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Capacitance measurements for an integrated circuit
- Patent number 6,934,669
- Issue date Aug 23, 2005
- Roberto Suaya
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...
- Publication number 20150161324
- Publication date Jun 11, 2015
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...
- Publication number 20140223401
- Publication date Aug 7, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MUTUAL INDUCTANCE EXTRACTION USING DIPOLE APPROXIMATIONS
- Publication number 20140033164
- Publication date Jan 30, 2014
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...
- Publication number 20120254814
- Publication date Oct 4, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING MUTUAL INDUCTANCE BETWEEN INTENTIONAL INDUCTORS
- Publication number 20120204139
- Publication date Aug 9, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODELING THE SKIN EFFECT USING EFFICIENT CONDUCTION MODE TECHNIQUES
- Publication number 20120011485
- Publication date Jan 12, 2012
- Mentor Graphics Corporation
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTRACTING HIGH FREQUENCY IMPEDANCE IN A CIRCUIT DESIGN USING AN EL...
- Publication number 20100251191
- Publication date Sep 30, 2010
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...
- Publication number 20090228847
- Publication date Sep 10, 2009
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mutual Inductance extraction using dipole approximations
- Publication number 20090172613
- Publication date Jul 2, 2009
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNTHESIS STRATEGIES BASED ON THE APPROPRIATE USE OF INDUCTANCE EFF...
- Publication number 20090013300
- Publication date Jan 8, 2009
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modeling the skin effect using efficient conduction mode techniques
- Publication number 20080276207
- Publication date Nov 6, 2008
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Extracting high frequency impedance in a circuit design using an el...
- Publication number 20070226659
- Publication date Sep 27, 2007
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Extracting high frequency impedance in a circuit design using broad...
- Publication number 20070225925
- Publication date Sep 27, 2007
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determining mutual inductance between intentional inductors
- Publication number 20060282492
- Publication date Dec 14, 2006
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synthesis strategies based on the appropriate use of inductance eff...
- Publication number 20060143586
- Publication date Jun 29, 2006
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Capacitance measurements for an integrated circuit
- Publication number 20050268260
- Publication date Dec 1, 2005
- Roberto Suaya
- G01 - MEASURING TESTING
Information Patent Application
Mutual inductance extraction using dipole approximations
- Publication number 20050120316
- Publication date Jun 2, 2005
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synthesis strategies based on the appropriate use of inductance eff...
- Publication number 20030131334
- Publication date Jul 10, 2003
- Roberto Suaya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Capacitance and transmission line measurements for an integrated ci...
- Publication number 20020116696
- Publication date Aug 22, 2002
- Roberto Suaya
- G01 - MEASURING TESTING

Roberto Suaya

Person

Patents Grantslast 30 patents

High-frequency VLSI interconnect and intentional inductor impedance...

High-frequency VLSI interconnect and intentional inductor impedance...

Mutual inductance extraction using dipole approximations

High-frequency VLSI interconnect and intentional inductor impedance...

Extracting high frequency impedance in a circuit design using an el...

Determining mutual inductance between intentional inductors

Mutual inductance extraction using dipole approximations

Through-silicon via admittance extraction

Through silicon via impedance extraction

Modeling the skin effect using efficient conduction mode techniques

High-frequency VLSI interconnect and intentional inductor impedance...

Determining mutual inductance between intentional inductors

Synthesis strategies based on the appropriate use of inductance eff...

Modeling the skin effect using efficient conduction mode techniques

Extracting high frequency impedance in a circuit design using an el...

Mutual inductance extraction using dipole approximations

Extracting high frequency impedance in a circuit design using broad...

Synthesis strategies based on the appropriate use of inductance eff...

Capacitance measurements for an integrated circuit

Capacitance and transmission line measurements for an integrated ci...

Synthesis strategies based on the appropriate use of inductance eff...

Capacitance measurements for an integrated circuit

Patents Applicationslast 30 patents

HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...

HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...

MUTUAL INDUCTANCE EXTRACTION USING DIPOLE APPROXIMATIONS

HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...

DETERMINING MUTUAL INDUCTANCE BETWEEN INTENTIONAL INDUCTORS

MODELING THE SKIN EFFECT USING EFFICIENT CONDUCTION MODE TECHNIQUES

EXTRACTING HIGH FREQUENCY IMPEDANCE IN A CIRCUIT DESIGN USING AN EL...

HIGH-FREQUENCY VLSI INTERCONNECT AND INTENTIONAL INDUCTOR IMPEDANCE...

Mutual Inductance extraction using dipole approximations

SYNTHESIS STRATEGIES BASED ON THE APPROPRIATE USE OF INDUCTANCE EFF...

Modeling the skin effect using efficient conduction mode techniques

Extracting high frequency impedance in a circuit design using an el...

Extracting high frequency impedance in a circuit design using broad...

Determining mutual inductance between intentional inductors

Synthesis strategies based on the appropriate use of inductance eff...

Capacitance measurements for an integrated circuit

Mutual inductance extraction using dipole approximations

Synthesis strategies based on the appropriate use of inductance eff...

Capacitance and transmission line measurements for an integrated ci...