Roger Carpenter

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Generating integrated circuit placements using neural networks
- Patent number 11,853,677
- Issue date Dec 26, 2023
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating integrated circuit placements using neural networks
- Patent number 11,556,690
- Issue date Jan 17, 2023
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating integrated circuit placements using neural networks
- Patent number 11,216,609
- Issue date Jan 4, 2022
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing analysis and optimization of asynchronous circuit designs
- Patent number 10,318,691
- Issue date Jun 11, 2019
- Wave Computing, Inc.
- Philippe Francis Sarrazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threshold circuitry based on silicon-on-insulator technology
- Patent number 9,257,984
- Issue date Feb 9, 2016
- Wave Semiconductor, Inc.
- Gajendra Prasad Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for repeated block modification for chip routing
- Patent number 8,893,070
- Issue date Nov 18, 2014
- Synopsys, Inc.
- Jacob Avidan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for repeated block modification for chip routing
- Patent number 8,407,650
- Issue date Mar 26, 2013
- Synopsis, Inc.
- Jacob Avidan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for repeated block timing analysis
- Patent number 7,971,168
- Issue date Jun 28, 2011
- Magna Design Automation, Inc.
- Robert Swanson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
- Publication number 20240249058
- Publication date Jul 25, 2024
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiply-Instantiated Block Modeling For Circuit Component Placemen...
- Publication number 20240143885
- Publication date May 2, 2024
- Google LLC
- Myung-Chul Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Alignment Cost for Integrated Circuit Placement
- Publication number 20240095424
- Publication date Mar 21, 2024
- Google LLC
- Ebrahim Mohammadgholi Songhori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
- Publication number 20230117786
- Publication date Apr 20, 2023
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
- Publication number 20220108058
- Publication date Apr 7, 2022
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
- Publication number 20210334445
- Publication date Oct 28, 2021
- Google LLC
- Anna Darling Goldie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING ANALYSIS AND OPTIMIZATION OF ASYNCHRONOUS CIRCUIT DESIGNS
- Publication number 20170371993
- Publication date Dec 28, 2017
- Wave Computing, Inc.
- Philippe Francis Sarrazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-THRESHOLD CIRCUITRY BASED ON SILICON-ON-INSULATOR TECHNOLOGY
- Publication number 20150076564
- Publication date Mar 19, 2015
- WAVE SEMICONDUCTOR, INC.
- Gajendra Prasad Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR REPEATED BLOCK MODIFICATION FOR CHIP ROUTING
- Publication number 20130227511
- Publication date Aug 29, 2013
- Synopsys, Inc.
- Jacob Avidan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Relative Floorplanning For Improved Integrated Circuit Design
- Publication number 20070266359
- Publication date Nov 15, 2007
- Magma Design Automation, Inc.
- Henrik Esbensen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PLACEMENT OF SOFT MACROS
- Publication number 20070245280
- Publication date Oct 18, 2007
- MAGMA DESIGN AUTOMATION, INC.
- Cornells Van Eijk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Placement-Driven Physical-Hierarchy Generation
- Publication number 20070245281
- Publication date Oct 18, 2007
- Michael A. Riepe
- G06 - COMPUTING CALCULATING COUNTING

Roger Carpenter

Person

Patents Grantslast 30 patents

Generating integrated circuit placements using neural networks

Generating integrated circuit placements using neural networks

Generating integrated circuit placements using neural networks

Timing analysis and optimization of asynchronous circuit designs

Multi-threshold circuitry based on silicon-on-insulator technology

Method for repeated block modification for chip routing

Method for repeated block modification for chip routing

Method for repeated block timing analysis

Patents Applicationslast 30 patents

GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS

Multiply-Instantiated Block Modeling For Circuit Component Placemen...

Alignment Cost for Integrated Circuit Placement

GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS

GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS

GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS

TIMING ANALYSIS AND OPTIMIZATION OF ASYNCHRONOUS CIRCUIT DESIGNS

MULTI-THRESHOLD CIRCUITRY BASED ON SILICON-ON-INSULATOR TECHNOLOGY

METHOD FOR REPEATED BLOCK MODIFICATION FOR CHIP ROUTING

Relative Floorplanning For Improved Integrated Circuit Design

SYSTEM AND METHOD FOR PLACEMENT OF SOFT MACROS

Placement-Driven Physical-Hierarchy Generation