Roger Paul Gregor

Person

Endicott, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pulse generator with controlled output characteristics
- Patent number 6,661,121
- Issue date Dec 9, 2003
- International Business Machines Corporation
- Roger P. Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Latch clustering for power optimization
- Patent number 6,609,228
- Issue date Aug 19, 2003
- International Business Machines Corporation
- Paul H. Bergeron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-regulating voltage divider for series-stacked voltage rails
- Patent number 6,509,725
- Issue date Jan 21, 2003
- International Business Machines Corporation
- Kerry Bernstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CMOS state saving latch
- Patent number 6,493,257
- Issue date Dec 10, 2002
- International Business Machines Corporation
- Terry C. Coughlin
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable delay circuit having a fine delay element selectively...
- Patent number 6,421,784
- Issue date Jul 16, 2002
- International Business Machines Corporation
- Albert Manhee Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple power distribution for delta-I noise reduction
- Patent number 6,335,494
- Issue date Jan 1, 2002
- International Business Machines Corporation
- Roger P. Gregor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low power LSSD flip flops and a flushable single clock splitter for...
- Patent number 6,304,122
- Issue date Oct 16, 2001
- International Business Machines Corporation
- Roger P. Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Double-edge-triggered flip-flop providing two data transitions per...
- Patent number 6,300,809
- Issue date Oct 9, 2001
- International Business Machines Corporation
- Roger Paul Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual mode programmable delay element
- Patent number 6,222,407
- Issue date Apr 24, 2001
- International Business Machines Corporation
- Roger Paul Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for routing low-skew clock networks
- Patent number 6,204,713
- Issue date Mar 20, 2001
- International Business Machines Corporation
- Janice M. Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-pitch perimeter flip-chip footprint for high integration asics
- Patent number 6,037,677
- Issue date Mar 14, 2000
- International Business Machines Corporation
- Robert A. Gottschall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
VLSI test circuit apparatus and method
- Patent number 5,920,575
- Issue date Jul 6, 1999
- International Business Machines Corporation
- Roger Paul Gregor
- G01 - MEASURING TESTING
Information Patent Grant
Low power CMOS latch
- Patent number 5,760,627
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Roger Paul Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High density two port SRAM cell for low voltage CMOS applications
- Patent number 5,710,742
- Issue date Jan 20, 1998
- International Business Machines Corporation
- Eric Lee Carter
- G11 - INFORMATION STORAGE
Information Patent Grant
Bidirectional level shifting interface circuit
- Patent number 5,084,637
- Issue date Jan 28, 1992
- International Business Machines Corp.
- Roger P. Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Pulse generator with controlled output characteristics
- Publication number 20030052546
- Publication date Mar 20, 2003
- International Business Machines Corporation
- Roger P. Gregor
- H03 - BASIC ELECTRONIC CIRCUITRY

Roger Paul Gregor

Person

Patents Grantslast 30 patents

Pulse generator with controlled output characteristics

Latch clustering for power optimization

Self-regulating voltage divider for series-stacked voltage rails

CMOS state saving latch

Programmable delay circuit having a fine delay element selectively...

Multiple power distribution for delta-I noise reduction

Low power LSSD flip flops and a flushable single clock splitter for...

Double-edge-triggered flip-flop providing two data transitions per...

Dual mode programmable delay element

Method and apparatus for routing low-skew clock networks

Dual-pitch perimeter flip-chip footprint for high integration asics

VLSI test circuit apparatus and method

Low power CMOS latch

High density two port SRAM cell for low voltage CMOS applications

Bidirectional level shifting interface circuit

Patents Applicationslast 30 patents

Pulse generator with controlled output characteristics